| From 2e5a43fe14212401fa49f644480e652724af5880 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Mon, 1 Jun 2020 17:18:56 -0700 |
| Subject: ARM: dts: omap4-droid4: Fix spi configuration and increase rate |
| |
| From: Tony Lindgren <tony@atomide.com> |
| |
| [ Upstream commit 0df12a01f4857495816b05f048c4c31439446e35 ] |
| |
| We can currently sometimes get "RXS timed out" errors and "EOT timed out" |
| errors with spi transfers. |
| |
| These errors can be made easy to reproduce by reading the cpcap iio |
| values in a loop while keeping the CPUs busy by also reading /dev/urandom. |
| |
| The "RXS timed out" errors we can fix by adding spi-cpol and spi-cpha |
| in addition to the spi-cs-high property we already have. |
| |
| The "EOT timed out" errors we can fix by increasing the spi clock rate |
| to 9.6 MHz. Looks similar MC13783 PMIC says it works at spi clock rates |
| up to 20 MHz, so let's assume we can pick any rate up to 20 MHz also |
| for cpcap. |
| |
| Cc: maemo-leste@lists.dyne.org |
| Cc: Merlijn Wajer <merlijn@wizzup.org> |
| Cc: Pavel Machek <pavel@ucw.cz> |
| Cc: Sebastian Reichel <sre@kernel.org> |
| Signed-off-by: Tony Lindgren <tony@atomide.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi | 4 +++- |
| 1 file changed, 3 insertions(+), 1 deletion(-) |
| |
| diff --git a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi |
| index 82f7ae030600d..ab91c4ebb1463 100644 |
| --- a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi |
| +++ b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi |
| @@ -13,8 +13,10 @@ |
| #interrupt-cells = <2>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| - spi-max-frequency = <3000000>; |
| + spi-max-frequency = <9600000>; |
| spi-cs-high; |
| + spi-cpol; |
| + spi-cpha; |
| |
| cpcap_adc: adc { |
| compatible = "motorola,mapphone-cpcap-adc"; |
| -- |
| 2.25.1 |
| |
