| From 5ecad245de2ae23dc4e2dbece92f8ccfbaed2fa7 Mon Sep 17 00:00:00 2001 |
| From: Paolo Bonzini <pbonzini@redhat.com> |
| Date: Tue, 30 Jun 2020 07:07:20 -0400 |
| Subject: KVM: x86: bit 8 of non-leaf PDPEs is not reserved |
| |
| From: Paolo Bonzini <pbonzini@redhat.com> |
| |
| commit 5ecad245de2ae23dc4e2dbece92f8ccfbaed2fa7 upstream. |
| |
| Bit 8 would be the "global" bit, which does not quite make sense for non-leaf |
| page table entries. Intel ignores it; AMD ignores it in PDEs and PDPEs, but |
| reserves it in PML4Es. |
| |
| Probably, earlier versions of the AMD manual documented it as reserved in PDPEs |
| as well, and that behavior made it into KVM as well as kvm-unit-tests; fix it. |
| |
| Cc: stable@vger.kernel.org |
| Reported-by: Nadav Amit <namit@vmware.com> |
| Fixes: a0c0feb57992 ("KVM: x86: reserve bit 8 of non-leaf PDPEs and PML4Es in 64-bit mode on AMD", 2014-09-03) |
| Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| arch/x86/kvm/mmu.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/arch/x86/kvm/mmu.c |
| +++ b/arch/x86/kvm/mmu.c |
| @@ -4580,7 +4580,7 @@ __reset_rsvds_bits_mask(struct kvm_vcpu |
| nonleaf_bit8_rsvd | rsvd_bits(7, 7) | |
| rsvd_bits(maxphyaddr, 51); |
| rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd | |
| - nonleaf_bit8_rsvd | gbpages_bit_rsvd | |
| + gbpages_bit_rsvd | |
| rsvd_bits(maxphyaddr, 51); |
| rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | |
| rsvd_bits(maxphyaddr, 51); |