| From 5c975a66173ce4d7f84e83b7f5aad431d4dd549e Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 9 Jul 2020 09:17:05 +0100 |
| Subject: clk: scmi: Fix min and max rate when registering clocks with discrete |
| rates |
| |
| From: Sudeep Holla <sudeep.holla@arm.com> |
| |
| [ Upstream commit fcd2e0deae50bce48450f14c8fc5611b08d7438c ] |
| |
| Currently we are not initializing the scmi clock with discrete rates |
| correctly. We fetch the min_rate and max_rate value only for clocks with |
| ranges and ignore the ones with discrete rates. This will lead to wrong |
| initialization of rate range when clock supports discrete rate. |
| |
| Fix this by using the first and the last rate in the sorted list of the |
| discrete clock rates while registering the clock. |
| |
| Link: https://lore.kernel.org/r/20200709081705.46084-2-sudeep.holla@arm.com |
| Fixes: 6d6a1d82eaef7 ("clk: add support for clocks provided by SCMI") |
| Reviewed-by: Stephen Boyd <sboyd@kernel.org> |
| Reported-and-tested-by: Dien Pham <dien.pham.ry@renesas.com> |
| Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/clk/clk-scmi.c | 22 +++++++++++++++++++--- |
| 1 file changed, 19 insertions(+), 3 deletions(-) |
| |
| diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c |
| index c491f5de0f3f4..c754dfbb73fd4 100644 |
| --- a/drivers/clk/clk-scmi.c |
| +++ b/drivers/clk/clk-scmi.c |
| @@ -103,6 +103,8 @@ static const struct clk_ops scmi_clk_ops = { |
| static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) |
| { |
| int ret; |
| + unsigned long min_rate, max_rate; |
| + |
| struct clk_init_data init = { |
| .flags = CLK_GET_RATE_NOCACHE, |
| .num_parents = 0, |
| @@ -112,9 +114,23 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) |
| |
| sclk->hw.init = &init; |
| ret = devm_clk_hw_register(dev, &sclk->hw); |
| - if (!ret) |
| - clk_hw_set_rate_range(&sclk->hw, sclk->info->range.min_rate, |
| - sclk->info->range.max_rate); |
| + if (ret) |
| + return ret; |
| + |
| + if (sclk->info->rate_discrete) { |
| + int num_rates = sclk->info->list.num_rates; |
| + |
| + if (num_rates <= 0) |
| + return -EINVAL; |
| + |
| + min_rate = sclk->info->list.rates[0]; |
| + max_rate = sclk->info->list.rates[num_rates - 1]; |
| + } else { |
| + min_rate = sclk->info->range.min_rate; |
| + max_rate = sclk->info->range.max_rate; |
| + } |
| + |
| + clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate); |
| return ret; |
| } |
| |
| -- |
| 2.25.1 |
| |