| From 704d918341c378c5f9505dfdf32d315e256d3846 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@baylibre.com> |
| Date: Mon, 28 Jul 2025 18:00:17 +0200 |
| Subject: pwm: mediatek: Handle hardware enable and clock enable separately |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Uwe Kleine-König <u.kleine-koenig@baylibre.com> |
| |
| commit 704d918341c378c5f9505dfdf32d315e256d3846 upstream. |
| |
| Stop handling the clocks in pwm_mediatek_enable() and |
| pwm_mediatek_disable(). This is a preparing change for the next commit |
| that requires that clocks and the enable bit are handled separately. |
| |
| Also move these two functions a bit further up in the source file to |
| make them usable in pwm_mediatek_config(), which is needed in the next |
| commit, too. |
| |
| Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> |
| Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
| Link: https://lore.kernel.org/r/55c94fe2917ece152ee1e998f4675642a7716f13.1753717973.git.u.kleine-koenig@baylibre.com |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/pwm/pwm-mediatek.c | 60 +++++++++++++++++++++------------------------ |
| 1 file changed, 28 insertions(+), 32 deletions(-) |
| |
| --- a/drivers/pwm/pwm-mediatek.c |
| +++ b/drivers/pwm/pwm-mediatek.c |
| @@ -118,6 +118,26 @@ static inline void pwm_mediatek_writel(s |
| writel(value, chip->regs + chip->soc->reg_offset[num] + offset); |
| } |
| |
| +static void pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
| +{ |
| + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); |
| + u32 value; |
| + |
| + value = readl(pc->regs); |
| + value |= BIT(pwm->hwpwm); |
| + writel(value, pc->regs); |
| +} |
| + |
| +static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
| +{ |
| + struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); |
| + u32 value; |
| + |
| + value = readl(pc->regs); |
| + value &= ~BIT(pwm->hwpwm); |
| + writel(value, pc->regs); |
| +} |
| + |
| static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm, |
| int duty_ns, int period_ns) |
| { |
| @@ -180,35 +200,6 @@ out: |
| return ret; |
| } |
| |
| -static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
| -{ |
| - struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); |
| - u32 value; |
| - int ret; |
| - |
| - ret = pwm_mediatek_clk_enable(chip, pwm); |
| - if (ret < 0) |
| - return ret; |
| - |
| - value = readl(pc->regs); |
| - value |= BIT(pwm->hwpwm); |
| - writel(value, pc->regs); |
| - |
| - return 0; |
| -} |
| - |
| -static void pwm_mediatek_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
| -{ |
| - struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); |
| - u32 value; |
| - |
| - value = readl(pc->regs); |
| - value &= ~BIT(pwm->hwpwm); |
| - writel(value, pc->regs); |
| - |
| - pwm_mediatek_clk_disable(chip, pwm); |
| -} |
| - |
| static int pwm_mediatek_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
| const struct pwm_state *state) |
| { |
| @@ -218,8 +209,10 @@ static int pwm_mediatek_apply(struct pwm |
| return -EINVAL; |
| |
| if (!state->enabled) { |
| - if (pwm->state.enabled) |
| + if (pwm->state.enabled) { |
| pwm_mediatek_disable(chip, pwm); |
| + pwm_mediatek_clk_disable(chip, pwm); |
| + } |
| |
| return 0; |
| } |
| @@ -228,8 +221,11 @@ static int pwm_mediatek_apply(struct pwm |
| if (err) |
| return err; |
| |
| - if (!pwm->state.enabled) |
| - err = pwm_mediatek_enable(chip, pwm); |
| + if (!pwm->state.enabled) { |
| + err = pwm_mediatek_clk_enable(chip, pwm); |
| + if (!err) |
| + pwm_mediatek_enable(chip, pwm); |
| + } |
| |
| return err; |
| } |