| From foo@baz Tue May 4 09:25:24 AM CEST 2021 |
| From: Matt Redfearn <matt.redfearn@mips.com> |
| Date: Mon, 26 Feb 2018 17:02:42 +0000 |
| Subject: MIPS: Introduce isa-rev.h to define MIPS_ISA_REV |
| |
| From: Matt Redfearn <matt.redfearn@mips.com> |
| |
| commit 1690905240fd45cc04e873312df8574631c9f595 upstream |
| |
| There are multiple instances in the kernel where we need to include or |
| exclude particular instructions based on the ISA revision of the target |
| processor. For MIPS32 / MIPS64, the compiler exports a __mips_isa_rev |
| define. However, when targeting MIPS I - V, this define is absent. This |
| leads to each use of __mips_isa_rev having to check that it is defined |
| first. To simplify this, introduce the isa-rev.h header which always |
| exports MIPS_ISA_REV. The name is changed so as to avoid confusion with |
| the compiler builtin and to avoid accidentally using the builtin. |
| MIPS_ISA_REV is defined to the compilers builtin if provided, or 0, |
| which satisfies all current usages. |
| |
| Suggested-by: Paul Burton <paul.burton@mips.com> |
| Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> |
| Reviewed-by: Maciej W. Rozycki <macro@mips.com> |
| Cc: Ralf Baechle <ralf@linux-mips.org> |
| Cc: linux-mips@linux-mips.org |
| Patchwork: https://patchwork.linux-mips.org/patch/18676/ |
| Signed-off-by: James Hogan <jhogan@kernel.org> |
| Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/mips/include/asm/isa-rev.h | 24 ++++++++++++++++++++++++ |
| 1 file changed, 24 insertions(+) |
| create mode 100644 arch/mips/include/asm/isa-rev.h |
| |
| --- /dev/null |
| +++ b/arch/mips/include/asm/isa-rev.h |
| @@ -0,0 +1,24 @@ |
| +/* SPDX-License-Identifier: GPL-2.0 */ |
| +/* |
| + * Copyright (C) 2018 MIPS Tech, LLC |
| + * Author: Matt Redfearn <matt.redfearn@mips.com> |
| + */ |
| + |
| +#ifndef __MIPS_ASM_ISA_REV_H__ |
| +#define __MIPS_ASM_ISA_REV_H__ |
| + |
| +/* |
| + * The ISA revision level. This is 0 for MIPS I to V and N for |
| + * MIPS{32,64}rN. |
| + */ |
| + |
| +/* If the compiler has defined __mips_isa_rev, believe it. */ |
| +#ifdef __mips_isa_rev |
| +#define MIPS_ISA_REV __mips_isa_rev |
| +#else |
| +/* The compiler hasn't defined the isa rev so assume it's MIPS I - V (0) */ |
| +#define MIPS_ISA_REV 0 |
| +#endif |
| + |
| + |
| +#endif /* __MIPS_ASM_ISA_REV_H__ */ |
