blob: 81f11c3cb6e60a03bf64fde01d951026991a4199 [file]
From fe9092a84569df5233488f011de5b2a05f80bdbf Mon Sep 17 00:00:00 2001
From: Sasha Levin <sashal@kernel.org>
Date: Tue, 10 Sep 2024 16:47:28 -0700
Subject: drm/xe: Adjust mmio code to pass VF substructure to SRIOV code
From: Matt Roper <matthew.d.roper@intel.com>
[ Upstream commit 6fb5d1a1d376910700d054d13cefbf0812b444a9 ]
Although we want to break the GT-centric nature of the MMIO code in the
general driver, the SRIOV handling still relies on data in a VF
substructure of the GT. So add a GT backpointer, but name it
sriov_vf_gt to make it clear that it's only for this one specific
special case and will not be set or usable for anything else.
v2:
- Store backpointer to the GT itself rather than the SRIOV-specific
substructure. (Michal)
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> # v1
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-53-matthew.d.roper@intel.com
Stable-dep-of: 4a9b4e1fa52a ("drm/xe/mmio: Avoid double-adjust in 64-bit reads")
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/xe/xe_device_types.h | 8 ++++++++
drivers/gpu/drm/xe/xe_pci.c | 5 +++++
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index ee3d0354c1539..78a1f8b78e269 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -121,6 +121,14 @@ struct xe_mmio {
/** @regs: Map used to access registers. */
void __iomem *regs;
+ /**
+ * @sriov_vf_gt: Backpointer to GT.
+ *
+ * This pointer is only set for GT MMIO regions and only when running
+ * as an SRIOV VF structure
+ */
+ struct xe_gt *sriov_vf_gt;
+
/**
* @regs_size: Length of the register region within the map.
*
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index d0cc5d45a2e4b..9d807d9a0807a 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -711,6 +711,9 @@ static int xe_info_init(struct xe_device *xe,
gt->mmio.regs = tile->mmio.regs;
gt->mmio.regs_size = tile->mmio.regs_size;
gt->mmio.tile = tile;
+ if (IS_SRIOV_VF(xe))
+ gt->mmio.sriov_vf_gt = gt;
+
if (MEDIA_VER(xe) < 13 && media_desc)
gt->info.engine_mask |= media_desc->hw_engine_mask;
@@ -734,6 +737,8 @@ static int xe_info_init(struct xe_device *xe,
gt->mmio.adj_offset = MEDIA_GT_GSI_OFFSET;
gt->mmio.adj_limit = MEDIA_GT_GSI_LENGTH;
gt->mmio.tile = tile;
+ if (IS_SRIOV_VF(xe))
+ gt->mmio.sriov_vf_gt = gt;
/*
* FIXME: At the moment multi-tile and standalone media are
--
2.51.0