| From 4873867e5f2bd90faad861dd94865099fc3140f3 Mon Sep 17 00:00:00 2001 |
| From: Yitian Bu <buyitian@gmail.com> |
| Date: Fri, 2 Oct 2015 15:18:41 +0800 |
| Subject: ASoC: dwc: correct irq clear method |
| |
| From: Yitian Bu <buyitian@gmail.com> |
| |
| commit 4873867e5f2bd90faad861dd94865099fc3140f3 upstream. |
| |
| from Designware I2S datasheet, tx/rx XRUN irq is cleared by |
| reading register TOR/ROR, rather than by writing into them. |
| |
| Signed-off-by: Yitian Bu <yitian.bu@tangramtek.com> |
| Signed-off-by: Mark Brown <broonie@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| sound/soc/dwc/designware_i2s.c | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| --- a/sound/soc/dwc/designware_i2s.c |
| +++ b/sound/soc/dwc/designware_i2s.c |
| @@ -100,10 +100,10 @@ static inline void i2s_clear_irqs(struct |
| |
| if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| for (i = 0; i < 4; i++) |
| - i2s_write_reg(dev->i2s_base, TOR(i), 0); |
| + i2s_read_reg(dev->i2s_base, TOR(i)); |
| } else { |
| for (i = 0; i < 4; i++) |
| - i2s_write_reg(dev->i2s_base, ROR(i), 0); |
| + i2s_read_reg(dev->i2s_base, ROR(i)); |
| } |
| } |
| |
