| From 316e46f65a5497839857db08b6fbf60f568b165a Mon Sep 17 00:00:00 2001 |
| From: Arnd Bergmann <arnd@arndb.de> |
| Date: Wed, 16 Mar 2022 19:37:45 +0100 |
| Subject: arm64: errata: avoid duplicate field initializer |
| |
| From: Arnd Bergmann <arnd@arndb.de> |
| |
| commit 316e46f65a5497839857db08b6fbf60f568b165a upstream. |
| |
| The '.type' field is initialized both in place and in the macro |
| as reported by this W=1 warning: |
| |
| arch/arm64/include/asm/cpufeature.h:281:9: error: initialized field overwritten [-Werror=override-init] |
| 281 | (ARM64_CPUCAP_SCOPE_LOCAL_CPU | ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU) |
| | ^ |
| arch/arm64/kernel/cpu_errata.c:136:17: note: in expansion of macro 'ARM64_CPUCAP_LOCAL_CPU_ERRATUM' |
| 136 | .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, \ |
| | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| arch/arm64/kernel/cpu_errata.c:145:9: note: in expansion of macro 'ERRATA_MIDR_RANGE' |
| 145 | ERRATA_MIDR_RANGE(m, var, r_min, var, r_max) |
| | ^~~~~~~~~~~~~~~~~ |
| arch/arm64/kernel/cpu_errata.c:613:17: note: in expansion of macro 'ERRATA_MIDR_REV_RANGE' |
| 613 | ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2), |
| | ^~~~~~~~~~~~~~~~~~~~~ |
| arch/arm64/include/asm/cpufeature.h:281:9: note: (near initialization for 'arm64_errata[18].type') |
| 281 | (ARM64_CPUCAP_SCOPE_LOCAL_CPU | ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU) |
| | ^ |
| |
| Remove the extranous initializer. |
| |
| Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
| Fixes: 1dd498e5e26a ("KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata") |
| Link: https://lore.kernel.org/r/20220316183800.1546731-1-arnd@kernel.org |
| Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/arm64/kernel/cpu_errata.c | 1 - |
| 1 file changed, 1 deletion(-) |
| |
| --- a/arch/arm64/kernel/cpu_errata.c |
| +++ b/arch/arm64/kernel/cpu_errata.c |
| @@ -611,7 +611,6 @@ const struct arm64_cpu_capabilities arm6 |
| { |
| .desc = "ARM erratum 2077057", |
| .capability = ARM64_WORKAROUND_2077057, |
| - .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, |
| ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2), |
| }, |
| #endif |
