| From e34e26fd70f46e095238fcb902f33ee36c34824b Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 12 Nov 2024 10:16:13 +0000 |
| Subject: ARM: fix cacheflush with PAN |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> |
| |
| [ Upstream commit ca29cfcc4a21083d671522ad384532e28a43f033 ] |
| |
| It seems that the cacheflush syscall got broken when PAN for LPAE was |
| implemented. User access was not enabled around the cache maintenance |
| instructions, causing them to fault. |
| |
| Fixes: 7af5b901e847 ("ARM: 9358/2: Implement PAN for LPAE by TTBR0 page table walks disablement") |
| Reported-by: Michał Pecio <michal.pecio@gmail.com> |
| Tested-by: Michał Pecio <michal.pecio@gmail.com> |
| Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm/kernel/traps.c | 3 +++ |
| 1 file changed, 3 insertions(+) |
| |
| diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c |
| index 480e307501bb4..6ea645939573f 100644 |
| --- a/arch/arm/kernel/traps.c |
| +++ b/arch/arm/kernel/traps.c |
| @@ -570,6 +570,7 @@ static int bad_syscall(int n, struct pt_regs *regs) |
| static inline int |
| __do_cache_op(unsigned long start, unsigned long end) |
| { |
| + unsigned int ua_flags; |
| int ret; |
| |
| do { |
| @@ -578,7 +579,9 @@ __do_cache_op(unsigned long start, unsigned long end) |
| if (fatal_signal_pending(current)) |
| return 0; |
| |
| + ua_flags = uaccess_save_and_enable(); |
| ret = flush_icache_user_range(start, start + chunk); |
| + uaccess_restore(ua_flags); |
| if (ret) |
| return ret; |
| |
| -- |
| 2.43.0 |
| |
