| From 01350185fe02ae3ea2c12d578e06af0d5186f33e Mon Sep 17 00:00:00 2001 |
| From: Nicolas Dufresne <nicolas.dufresne@collabora.com> |
| Date: Mon, 17 Feb 2025 16:46:54 -0500 |
| Subject: media: verisilicon: Fix AV1 decoder clock frequency |
| |
| From: Nicolas Dufresne <nicolas.dufresne@collabora.com> |
| |
| commit 01350185fe02ae3ea2c12d578e06af0d5186f33e upstream. |
| |
| The desired clock frequency was correctly set to 400MHz in the device tree |
| but was lowered by the driver to 300MHz breaking 4K 60Hz content playback. |
| Fix the issue by removing the driver call to clk_set_rate(), which reduce |
| the amount of board specific code. |
| |
| Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588") |
| Cc: stable@vger.kernel.org |
| Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> |
| Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> |
| Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> |
| Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 9 --------- |
| 1 file changed, 9 deletions(-) |
| |
| --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c |
| +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c |
| @@ -17,7 +17,6 @@ |
| |
| #define RK3066_ACLK_MAX_FREQ (300 * 1000 * 1000) |
| #define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000) |
| -#define RK3588_ACLK_MAX_FREQ (300 * 1000 * 1000) |
| |
| #define ROCKCHIP_VPU981_MIN_SIZE 64 |
| |
| @@ -440,13 +439,6 @@ static int rk3066_vpu_hw_init(struct han |
| return 0; |
| } |
| |
| -static int rk3588_vpu981_hw_init(struct hantro_dev *vpu) |
| -{ |
| - /* Bump ACLKs to max. possible freq. to improve performance. */ |
| - clk_set_rate(vpu->clocks[0].clk, RK3588_ACLK_MAX_FREQ); |
| - return 0; |
| -} |
| - |
| static int rockchip_vpu_hw_init(struct hantro_dev *vpu) |
| { |
| /* Bump ACLK to max. possible freq. to improve performance. */ |
| @@ -807,7 +799,6 @@ const struct hantro_variant rk3588_vpu98 |
| .codec_ops = rk3588_vpu981_codec_ops, |
| .irqs = rk3588_vpu981_irqs, |
| .num_irqs = ARRAY_SIZE(rk3588_vpu981_irqs), |
| - .init = rk3588_vpu981_hw_init, |
| .clk_names = rk3588_vpu981_vpu_clk_names, |
| .num_clocks = ARRAY_SIZE(rk3588_vpu981_vpu_clk_names) |
| }; |
