| From c4f9c4c2b3f1831e932e04db992cf6fe92c2a95a Mon Sep 17 00:00:00 2001 |
| From: Jesse Barnes <jbarnes@virtuousgeek.org> |
| Date: Mon, 10 Oct 2011 14:28:52 -0700 |
| Subject: drm/i915: always set FDI composite sync bit |
| |
| From: Jesse Barnes <jbarnes@virtuousgeek.org> |
| |
| commit c4f9c4c2b3f1831e932e04db992cf6fe92c2a95a upstream. |
| |
| It's needed for 3 pipe support as well as just regular functionality |
| (e.g. DisplayPort). |
| |
| Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> |
| Tested-by: Adam Jackson <ajax@redhat.com> |
| Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> |
| Signed-off-by: Keith Packard <keithp@keithp.com> |
| Signed-off-by: Robert Hooker <robert.hooker@canonical.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
| |
| --- |
| drivers/gpu/drm/i915/i915_reg.h | 1 + |
| drivers/gpu/drm/i915/intel_display.c | 2 ++ |
| 2 files changed, 3 insertions(+) |
| |
| --- a/drivers/gpu/drm/i915/i915_reg.h |
| +++ b/drivers/gpu/drm/i915/i915_reg.h |
| @@ -3141,6 +3141,7 @@ |
| #define FDI_LINK_TRAIN_NONE_IVB (3<<8) |
| |
| /* both Tx and Rx */ |
| +#define FDI_COMPOSITE_SYNC (1<<11) |
| #define FDI_LINK_TRAIN_AUTO (1<<10) |
| #define FDI_SCRAMBLING_ENABLE (0<<7) |
| #define FDI_SCRAMBLING_DISABLE (1<<7) |
| --- a/drivers/gpu/drm/i915/intel_display.c |
| +++ b/drivers/gpu/drm/i915/intel_display.c |
| @@ -2340,6 +2340,7 @@ static void ivb_manual_fdi_link_train(st |
| temp |= FDI_LINK_TRAIN_PATTERN_1_IVB; |
| temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; |
| temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B; |
| + temp |= FDI_COMPOSITE_SYNC; |
| I915_WRITE(reg, temp | FDI_TX_ENABLE); |
| |
| reg = FDI_RX_CTL(pipe); |
| @@ -2347,6 +2348,7 @@ static void ivb_manual_fdi_link_train(st |
| temp &= ~FDI_LINK_TRAIN_AUTO; |
| temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT; |
| temp |= FDI_LINK_TRAIN_PATTERN_1_CPT; |
| + temp |= FDI_COMPOSITE_SYNC; |
| I915_WRITE(reg, temp | FDI_RX_ENABLE); |
| |
| POSTING_READ(reg); |
