| From 75569c182e4f65cd8826a5853dc9cbca703cbd0e Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= <nicolai.haehnle@amd.com> |
| Date: Thu, 12 Apr 2018 16:34:19 +0200 |
| Subject: drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Nicolai Hähnle <nicolai.haehnle@amd.com> |
| |
| commit 75569c182e4f65cd8826a5853dc9cbca703cbd0e upstream. |
| |
| Otherwise, the SQ may skip some of the register writes, or shader waves may |
| be allocated where we don't expect them, so that as a result we don't actually |
| reset all of the register SRAMs. This can lead to spurious ECC errors later on |
| if a shader uses an uninitialized register. |
| |
| Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> |
| Reviewed-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 7 +++++-- |
| 1 file changed, 5 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |
| +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |
| @@ -1484,10 +1484,11 @@ static const u32 sgpr_init_compute_shade |
| static const u32 vgpr_init_regs[] = |
| { |
| mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0xffffffff, |
| - mmCOMPUTE_RESOURCE_LIMITS, 0, |
| + mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, /* CU_GROUP_COUNT=1 */ |
| mmCOMPUTE_NUM_THREAD_X, 256*4, |
| mmCOMPUTE_NUM_THREAD_Y, 1, |
| mmCOMPUTE_NUM_THREAD_Z, 1, |
| + mmCOMPUTE_PGM_RSRC1, 0x100004f, /* VGPRS=15 (64 logical VGPRs), SGPRS=1 (16 SGPRs), BULKY=1 */ |
| mmCOMPUTE_PGM_RSRC2, 20, |
| mmCOMPUTE_USER_DATA_0, 0xedcedc00, |
| mmCOMPUTE_USER_DATA_1, 0xedcedc01, |
| @@ -1504,10 +1505,11 @@ static const u32 vgpr_init_regs[] = |
| static const u32 sgpr1_init_regs[] = |
| { |
| mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0x0f, |
| - mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, |
| + mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, /* CU_GROUP_COUNT=1 */ |
| mmCOMPUTE_NUM_THREAD_X, 256*5, |
| mmCOMPUTE_NUM_THREAD_Y, 1, |
| mmCOMPUTE_NUM_THREAD_Z, 1, |
| + mmCOMPUTE_PGM_RSRC1, 0x240, /* SGPRS=9 (80 GPRS) */ |
| mmCOMPUTE_PGM_RSRC2, 20, |
| mmCOMPUTE_USER_DATA_0, 0xedcedc00, |
| mmCOMPUTE_USER_DATA_1, 0xedcedc01, |
| @@ -1528,6 +1530,7 @@ static const u32 sgpr2_init_regs[] = |
| mmCOMPUTE_NUM_THREAD_X, 256*5, |
| mmCOMPUTE_NUM_THREAD_Y, 1, |
| mmCOMPUTE_NUM_THREAD_Z, 1, |
| + mmCOMPUTE_PGM_RSRC1, 0x240, /* SGPRS=9 (80 GPRS) */ |
| mmCOMPUTE_PGM_RSRC2, 20, |
| mmCOMPUTE_USER_DATA_0, 0xedcedc00, |
| mmCOMPUTE_USER_DATA_1, 0xedcedc01, |
