| From 451888886551a00f0c51e3282290628f9583a01d Mon Sep 17 00:00:00 2001 |
| From: Alan Kao <alankao@andestech.com> |
| Date: Fri, 22 Mar 2019 14:37:04 +0800 |
| Subject: riscv: fix accessing 8-byte variable from RV32 |
| |
| [ Upstream commit dbee9c9c45846f003ec2f819710c2f4835630a6a ] |
| |
| A memory save operation to 8-byte variable in RV32 is divided into |
| two sw instructions in the put_user macro. The current fixup returns |
| execution flow to the second sw instead of the one after it. |
| |
| This patch fixes this fixup code according to the load access part. |
| |
| Signed-off-by: Alan Kao<alankao@andestech.com> |
| Cc: Greentime Hu <greentime@andestech.com> |
| Cc: Vincent Chen <deanbo422@gmail.com> |
| Signed-off-by: Palmer Dabbelt <palmer@sifive.com> |
| Signed-off-by: Sasha Levin (Microsoft) <sashal@kernel.org> |
| --- |
| arch/riscv/include/asm/uaccess.h | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h |
| index 637b896894fc..aa82df30e38a 100644 |
| --- a/arch/riscv/include/asm/uaccess.h |
| +++ b/arch/riscv/include/asm/uaccess.h |
| @@ -301,7 +301,7 @@ do { \ |
| " .balign 4\n" \ |
| "4:\n" \ |
| " li %0, %6\n" \ |
| - " jump 2b, %1\n" \ |
| + " jump 3b, %1\n" \ |
| " .previous\n" \ |
| " .section __ex_table,\"a\"\n" \ |
| " .balign " RISCV_SZPTR "\n" \ |
| -- |
| 2.20.1 |
| |
