| From d1af538f41117bf9646e6eae2dfe8779df1ec8b7 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 28 Sep 2021 08:19:03 -0700 |
| Subject: perf/x86/intel: Update event constraints for ICX |
| |
| From: Kan Liang <kan.liang@linux.intel.com> |
| |
| [ Upstream commit ecc2123e09f9e71ddc6c53d71e283b8ada685fe2 ] |
| |
| According to the latest event list, the event encoding 0xEF is only |
| available on the first 4 counters. Add it into the event constraints |
| table. |
| |
| Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support") |
| Signed-off-by: Kan Liang <kan.liang@linux.intel.com> |
| Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> |
| Link: https://lkml.kernel.org/r/1632842343-25862-1-git-send-email-kan.liang@linux.intel.com |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/x86/events/intel/core.c | 1 + |
| 1 file changed, 1 insertion(+) |
| |
| diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c |
| index 3b8b8eede1a8..4684bf9fcc42 100644 |
| --- a/arch/x86/events/intel/core.c |
| +++ b/arch/x86/events/intel/core.c |
| @@ -263,6 +263,7 @@ static struct event_constraint intel_icl_event_constraints[] = { |
| INTEL_EVENT_CONSTRAINT_RANGE(0xa8, 0xb0, 0xf), |
| INTEL_EVENT_CONSTRAINT_RANGE(0xb7, 0xbd, 0xf), |
| INTEL_EVENT_CONSTRAINT_RANGE(0xd0, 0xe6, 0xf), |
| + INTEL_EVENT_CONSTRAINT(0xef, 0xf), |
| INTEL_EVENT_CONSTRAINT_RANGE(0xf0, 0xf4, 0xf), |
| EVENT_CONSTRAINT_END |
| }; |
| -- |
| 2.33.0 |
| |
