| From d4e567dc1d60c05675f5e9a012c634408512a44c Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 23 Jun 2021 13:59:26 +0200 |
| Subject: arm64: dts: rockchip: Fix GPU register width for RK3328 |
| |
| From: Alex Bee <knaerzche@gmail.com> |
| |
| [ Upstream commit 932b4610f55b49f3a158b0db451137bab7ed0e1f ] |
| |
| As can be seen in RK3328's TRM the register range for the GPU is |
| 0xff300000 to 0xff330000. |
| It would (and does in vendor kernel) overlap with the registers of |
| the HEVC encoder (node/driver do not exist yet in upstream kernel). |
| See already existing h265e_mmu node. |
| |
| Fixes: 752fbc0c8da7 ("arm64: dts: rockchip: add rk3328 mali gpu node") |
| Signed-off-by: Alex Bee <knaerzche@gmail.com> |
| Link: https://lore.kernel.org/r/20210623115926.164861-1-knaerzche@gmail.com |
| Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi |
| index 44ad744c4710d..6ddb6b8c1fad5 100644 |
| --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi |
| +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi |
| @@ -555,7 +555,7 @@ |
| |
| gpu: gpu@ff300000 { |
| compatible = "rockchip,rk3328-mali", "arm,mali-450"; |
| - reg = <0x0 0xff300000 0x0 0x40000>; |
| + reg = <0x0 0xff300000 0x0 0x30000>; |
| interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, |
| -- |
| 2.33.0 |
| |
