| From 95997723b6402cd6c53e0f9e7ac640ec64eaaff8 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org> |
| Date: Thu, 28 Oct 2021 20:56:55 +0200 |
| Subject: PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Marek Behún <kabel@kernel.org> |
| |
| commit 95997723b6402cd6c53e0f9e7ac640ec64eaaff8 upstream. |
| |
| The PCIE_MSI_PAYLOAD_REG contains 16-bit MSI number, not only lower |
| 8 bits. Fix reading content of this register and add a comment |
| describing the access to this register. |
| |
| Link: https://lore.kernel.org/r/20211028185659.20329-4-kabel@kernel.org |
| Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") |
| Signed-off-by: Pali Rohár <pali@kernel.org> |
| Signed-off-by: Marek Behún <kabel@kernel.org> |
| Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/pci/controller/pci-aardvark.c | 7 ++++++- |
| 1 file changed, 6 insertions(+), 1 deletion(-) |
| |
| --- a/drivers/pci/controller/pci-aardvark.c |
| +++ b/drivers/pci/controller/pci-aardvark.c |
| @@ -120,6 +120,7 @@ |
| #define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58) |
| #define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C) |
| #define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C) |
| +#define PCIE_MSI_DATA_MASK GENMASK(15, 0) |
| |
| /* LMI registers base address and register offsets */ |
| #define LMI_BASE_ADDR 0x6000 |
| @@ -1123,8 +1124,12 @@ static void advk_pcie_handle_msi(struct |
| if (!(BIT(msi_idx) & msi_status)) |
| continue; |
| |
| + /* |
| + * msi_idx contains bits [4:0] of the msi_data and msi_data |
| + * contains 16bit MSI interrupt number |
| + */ |
| advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); |
| - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF; |
| + msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; |
| generic_handle_irq(msi_data); |
| } |
| |
