| From 3837407c1aa1101ed5e214c7d6041e7a23335c6e Mon Sep 17 00:00:00 2001 |
| From: Eric Auger <eric.auger@redhat.com> |
| Date: Fri, 24 Jan 2020 15:25:32 +0100 |
| Subject: KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset |
| |
| From: Eric Auger <eric.auger@redhat.com> |
| |
| commit 3837407c1aa1101ed5e214c7d6041e7a23335c6e upstream. |
| |
| The specification says PMSWINC increments PMEVCNTR<n>_EL1 by 1 |
| if PMEVCNTR<n>_EL0 is enabled and configured to count SW_INCR. |
| |
| For PMEVCNTR<n>_EL0 to be enabled, we need both PMCNTENSET to |
| be set for the corresponding event counter but we also need |
| the PMCR.E bit to be set. |
| |
| Fixes: 7a0adc7064b8 ("arm64: KVM: Add access handler for PMSWINC register") |
| Signed-off-by: Eric Auger <eric.auger@redhat.com> |
| Signed-off-by: Marc Zyngier <maz@kernel.org> |
| Reviewed-by: Andrew Murray <andrew.murray@arm.com> |
| Acked-by: Marc Zyngier <maz@kernel.org> |
| Link: https://lore.kernel.org/r/20200124142535.29386-2-eric.auger@redhat.com |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| virt/kvm/arm/pmu.c | 3 +++ |
| 1 file changed, 3 insertions(+) |
| |
| --- a/virt/kvm/arm/pmu.c |
| +++ b/virt/kvm/arm/pmu.c |
| @@ -486,6 +486,9 @@ void kvm_pmu_software_increment(struct k |
| if (val == 0) |
| return; |
| |
| + if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) |
| + return; |
| + |
| enable = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); |
| for (i = 0; i < ARMV8_PMU_CYCLE_IDX; i++) { |
| if (!(val & BIT(i))) |
