| From 370ce45b5986118fa496dddbcd7039e1aa1a418f Mon Sep 17 00:00:00 2001 |
| From: Alex Deucher <alexander.deucher@amd.com> |
| Date: Tue, 23 Sep 2014 10:20:13 -0400 |
| Subject: drm/radeon/cik: use a separate counter for CP init timeout |
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| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Alex Deucher <alexander.deucher@amd.com> |
| |
| commit 370ce45b5986118fa496dddbcd7039e1aa1a418f upstream. |
| |
| Otherwise we may fail to init the second compute ring. |
| |
| Noticed-by: Christian Kรถnig <christian.koenig@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/radeon/cik.c | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/gpu/drm/radeon/cik.c |
| +++ b/drivers/gpu/drm/radeon/cik.c |
| @@ -4392,7 +4392,7 @@ struct bonaire_mqd |
| */ |
| static int cik_cp_compute_resume(struct radeon_device *rdev) |
| { |
| - int r, i, idx; |
| + int r, i, j, idx; |
| u32 tmp; |
| bool use_doorbell = true; |
| u64 hqd_gpu_addr; |
| @@ -4511,7 +4511,7 @@ static int cik_cp_compute_resume(struct |
| mqd->queue_state.cp_hqd_pq_wptr= 0; |
| if (RREG32(CP_HQD_ACTIVE) & 1) { |
| WREG32(CP_HQD_DEQUEUE_REQUEST, 1); |
| - for (i = 0; i < rdev->usec_timeout; i++) { |
| + for (j = 0; j < rdev->usec_timeout; j++) { |
| if (!(RREG32(CP_HQD_ACTIVE) & 1)) |
| break; |
| udelay(1); |
