| From b0b4855099e301c8603ea37da9a0103a96c2e0b1 Mon Sep 17 00:00:00 2001 |
| From: Max Filippov <jcmvbkbc@gmail.com> |
| Date: Tue, 22 Sep 2015 14:32:03 +0300 |
| Subject: spi: xtensa-xtfpga: fix register endianness |
| |
| From: Max Filippov <jcmvbkbc@gmail.com> |
| |
| commit b0b4855099e301c8603ea37da9a0103a96c2e0b1 upstream. |
| |
| XTFPGA SPI controller has native endian registers. |
| Fix register acessors so that they work in big-endian configurations. |
| |
| Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> |
| Signed-off-by: Mark Brown <broonie@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/spi/spi-xtensa-xtfpga.c | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/spi/spi-xtensa-xtfpga.c |
| +++ b/drivers/spi/spi-xtensa-xtfpga.c |
| @@ -34,13 +34,13 @@ struct xtfpga_spi { |
| static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi, |
| unsigned addr, u32 val) |
| { |
| - iowrite32(val, spi->regs + addr); |
| + __raw_writel(val, spi->regs + addr); |
| } |
| |
| static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi, |
| unsigned addr) |
| { |
| - return ioread32(spi->regs + addr); |
| + return __raw_readl(spi->regs + addr); |
| } |
| |
| static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi) |
