| From foo@baz Tue 12 Nov 2019 04:10:24 PM CET |
| From: Chris Wilson <chris@chris-wilson.co.uk> |
| Date: Thu, 12 Jul 2018 19:53:12 +0100 |
| Subject: drm/i915/gtt: Disable read-only support under GVT |
| |
| From: Chris Wilson <chris@chris-wilson.co.uk> |
| |
| commit c9e666880de5a1fed04dc412b046916d542b72dd upstream. |
| |
| GVT is not propagating the PTE bits, and is always setting the |
| read-write bit, thus breaking read-only support. |
| |
| Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> |
| Cc: Zhenyu Wang <zhenyuw@linux.intel.com> |
| Cc: Jon Bloomfield <jon.bloomfield@intel.com> |
| Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> |
| Cc: Matthew Auld <matthew.william.auld@gmail.com> |
| Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com> |
| Link: https://patchwork.freedesktop.org/patch/msgid/20180712185315.3288-3-chris@chris-wilson.co.uk |
| Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++++++-- |
| 1 file changed, 6 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/gpu/drm/i915/i915_gem_gtt.c |
| +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c |
| @@ -1343,8 +1343,12 @@ static int gen8_ppgtt_init(struct i915_h |
| return ret; |
| } |
| |
| - /* From bdw, there is support for read-only pages in the PPGTT */ |
| - ppgtt->base.has_read_only = true; |
| + /* |
| + * From bdw, there is support for read-only pages in the PPGTT. |
| + * |
| + * XXX GVT is not honouring the lack of RW in the PTE bits. |
| + */ |
| + ppgtt->base.has_read_only = !intel_vgpu_active(dev_priv); |
| |
| /* There are only few exceptions for gen >=6. chv and bxt. |
| * And we are not sure about the latter so play safe for now. |
