| From 3ddb4ce1e6e3bd112778ab93bbd9092f23a878ec Mon Sep 17 00:00:00 2001 |
| From: Colin Ian King <colin.king@canonical.com> |
| Date: Mon, 26 Apr 2021 11:55:14 +0100 |
| Subject: serial: tegra: Fix a mask operation that is always true |
| |
| From: Colin Ian King <colin.king@canonical.com> |
| |
| commit 3ddb4ce1e6e3bd112778ab93bbd9092f23a878ec upstream. |
| |
| Currently the expression lsr | UART_LSR_TEMT is always true and |
| this seems suspect. I believe the intent was to mask lsr with UART_LSR_TEMT |
| to check that bit, so the expression should be using the & operator |
| instead. Fix this. |
| |
| Fixes: b9c2470fb150 ("serial: tegra: flush the RX fifo on frame error") |
| Signed-off-by: Colin Ian King <colin.king@canonical.com> |
| Cc: stable <stable@vger.kernel.org> |
| Link: https://lore.kernel.org/r/20210426105514.23268-1-colin.king@canonical.com |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/tty/serial/serial-tegra.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/tty/serial/serial-tegra.c |
| +++ b/drivers/tty/serial/serial-tegra.c |
| @@ -333,7 +333,7 @@ static void tegra_uart_fifo_reset(struct |
| |
| do { |
| lsr = tegra_uart_read(tup, UART_LSR); |
| - if ((lsr | UART_LSR_TEMT) && !(lsr & UART_LSR_DR)) |
| + if ((lsr & UART_LSR_TEMT) && !(lsr & UART_LSR_DR)) |
| break; |
| udelay(1); |
| } while (--tmout); |
