| From eec5f47a56c9e870593fabcb3259f2fd7ec182f3 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 9 Jun 2021 19:43:42 -0500 |
| Subject: net: phy: dp83867: perform soft reset and retain established link |
| |
| From: Praneeth Bajjuri <praneeth@ti.com> |
| |
| [ Upstream commit da9ef50f545f86ffe6ff786174d26500c4db737a ] |
| |
| Current logic is performing hard reset and causing the programmed |
| registers to be wiped out. |
| |
| as per datasheet: https://www.ti.com/lit/ds/symlink/dp83867cr.pdf |
| 8.6.26 Control Register (CTRL) |
| |
| do SW_RESTART to perform a reset not including the registers, |
| If performed when link is already present, |
| it will drop the link and trigger re-auto negotiation. |
| |
| Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> |
| Signed-off-by: Geet Modi <geet.modi@ti.com> |
| Reviewed-by: Andrew Lunn <andrew@lunn.ch> |
| Signed-off-by: David S. Miller <davem@davemloft.net> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/net/phy/dp83867.c | 6 +----- |
| 1 file changed, 1 insertion(+), 5 deletions(-) |
| |
| diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c |
| index 31a559513362..87c0cdbf262a 100644 |
| --- a/drivers/net/phy/dp83867.c |
| +++ b/drivers/net/phy/dp83867.c |
| @@ -468,16 +468,12 @@ static int dp83867_phy_reset(struct phy_device *phydev) |
| { |
| int err; |
| |
| - err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESET); |
| + err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESTART); |
| if (err < 0) |
| return err; |
| |
| usleep_range(10, 20); |
| |
| - /* After reset FORCE_LINK_GOOD bit is set. Although the |
| - * default value should be unset. Disable FORCE_LINK_GOOD |
| - * for the phy to work properly. |
| - */ |
| return phy_modify(phydev, MII_DP83867_PHYCTRL, |
| DP83867_PHYCR_FORCE_LINK_GOOD, 0); |
| } |
| -- |
| 2.30.2 |
| |
