| From 890d079282f573b1b87b1180c7450515913e44ae Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 15 Nov 2022 20:59:56 +0530 |
| Subject: clk: qcom: gcc-sc8280xp: add cxo as parent for three ufs ref clks |
| |
| From: Shazad Hussain <quic_shazhuss@quicinc.com> |
| |
| [ Upstream commit f6abcc21d94393801937aed808b8f055ffec8579 ] |
| |
| The three UFS reference clocks, gcc_ufs_ref_clkref_clk for external |
| UFS devices, gcc_ufs_card_clkref_clk and gcc_ufs_1_card_clkref_clk for |
| two PHYs are all sourced from CXO. |
| |
| Added parent_data for all three reference clocks described above to |
| reflect that all three clocks are sourced from CXO to have valid |
| frequency for the ref clock needed by UFS controller driver. |
| |
| Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver") |
| Link: https://lore.kernel.org/lkml/Y2Tber39cHuOSR%2FW@hovoldconsulting.com/ |
| Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> |
| Tested-by: Johan Hovold <johan+linaro@kernel.org> |
| Reviewed-by: Johan Hovold <johan+linaro@kernel.org> |
| Tested-by: Andrew Halaney <ahalaney@redhat.com> |
| Reviewed-by: Andrew Halaney <ahalaney@redhat.com> |
| Reviewed-by: Brian Masney <bmasney@redhat.com> |
| Link: https://lore.kernel.org/r/20221115152956.21677-1-quic_shazhuss@quicinc.com |
| Reviewed-by: Bjorn Andersson <andersson@kernel.org> |
| Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/clk/qcom/gcc-sc8280xp.c | 6 ++++++ |
| 1 file changed, 6 insertions(+) |
| |
| diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c |
| index a2f3ffcc5849..fd332383527f 100644 |
| --- a/drivers/clk/qcom/gcc-sc8280xp.c |
| +++ b/drivers/clk/qcom/gcc-sc8280xp.c |
| @@ -5364,6 +5364,8 @@ static struct clk_branch gcc_ufs_1_card_clkref_clk = { |
| .enable_mask = BIT(0), |
| .hw.init = &(const struct clk_init_data) { |
| .name = "gcc_ufs_1_card_clkref_clk", |
| + .parent_data = &gcc_parent_data_tcxo, |
| + .num_parents = 1, |
| .ops = &clk_branch2_ops, |
| }, |
| }, |
| @@ -5432,6 +5434,8 @@ static struct clk_branch gcc_ufs_card_clkref_clk = { |
| .enable_mask = BIT(0), |
| .hw.init = &(const struct clk_init_data) { |
| .name = "gcc_ufs_card_clkref_clk", |
| + .parent_data = &gcc_parent_data_tcxo, |
| + .num_parents = 1, |
| .ops = &clk_branch2_ops, |
| }, |
| }, |
| @@ -5848,6 +5852,8 @@ static struct clk_branch gcc_ufs_ref_clkref_clk = { |
| .enable_mask = BIT(0), |
| .hw.init = &(const struct clk_init_data) { |
| .name = "gcc_ufs_ref_clkref_clk", |
| + .parent_data = &gcc_parent_data_tcxo, |
| + .num_parents = 1, |
| .ops = &clk_branch2_ops, |
| }, |
| }, |
| -- |
| 2.35.1 |
| |