| From 5497d8019e25152a6cb14d56d2f4c6ee1f7e17f6 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 7 May 2024 14:01:39 -0400 |
| Subject: drm/amd/display: Fix pipe addition logic in calc_blocks_to_ungate |
| DCN35 |
| |
| From: Nicholas Susanto <nicholas.susanto@amd.com> |
| |
| [ Upstream commit 3aec7a5af4d6248b7462b7d1eb597f06d35f5ee0 ] |
| |
| [Why] |
| |
| Missing check for when there is new pipe configuration but both cur_pipe |
| and new_pipe are both populated causing update_state of DSC for that |
| instance not being updated correctly. |
| |
| This causes some display mode changes to cause underflow since DSCCLK |
| is still gated when the display requires DSC. |
| |
| [How] |
| |
| Added another condition in the new pipe addition branch that checks if |
| there is a new pipe configuration and if it is not the same as cur_pipe. |
| cur_pipe does not necessarily have to be NULL to go in this branch. |
| |
| Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
| Acked-by: Roman Li <roman.li@amd.com> |
| Signed-off-by: Nicholas Susanto <nicholas.susanto@amd.com> |
| Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 3 ++- |
| 1 file changed, 2 insertions(+), 1 deletion(-) |
| |
| diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c |
| index dcced89c07b3..f829ff82797e 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c |
| +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c |
| @@ -1077,7 +1077,8 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context, |
| continue; |
| |
| if ((!cur_pipe->plane_state && new_pipe->plane_state) || |
| - (!cur_pipe->stream && new_pipe->stream)) { |
| + (!cur_pipe->stream && new_pipe->stream) || |
| + (cur_pipe->stream != new_pipe->stream && new_pipe->stream)) { |
| // New pipe addition |
| for (j = 0; j < PG_HW_PIPE_RESOURCES_NUM_ELEMENT; j++) { |
| if (j == PG_HUBP && new_pipe->plane_res.hubp) |
| -- |
| 2.43.0 |
| |
