| From 0b8903a6fd15648cd4e543b6b3c50b3239d9948a Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 5 Jan 2024 08:55:43 +0000 |
| Subject: net: ethernet: ti: am65-cpsw: Fix max mtu to fit ethernet frames |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Sanjuán García, Jorge <Jorge.SanjuanGarcia@duagon.com> |
| |
| [ Upstream commit 64e47d8afb5ca533b27efc006405e5bcae2c4a7b ] |
| |
| The value of AM65_CPSW_MAX_PACKET_SIZE represents the maximum length |
| of a received frame. This value is written to the register |
| AM65_CPSW_PORT_REG_RX_MAXLEN. |
| |
| The maximum MTU configured on the network device should then leave |
| some room for the ethernet headers and frame check. Otherwise, if |
| the network interface is configured to its maximum mtu possible, |
| the frames will be larger than AM65_CPSW_MAX_PACKET_SIZE and will |
| get dropped as oversized. |
| |
| The switch supports ethernet frame sizes between 64 and 2024 bytes |
| (including VLAN) as stated in the technical reference manual, so |
| define AM65_CPSW_MAX_PACKET_SIZE with that maximum size. |
| |
| Fixes: 93a76530316a ("net: ethernet: ti: introduce am65x/j721e gigabit eth subsystem driver") |
| Signed-off-by: Jorge Sanjuan Garcia <jorge.sanjuangarcia@duagon.com> |
| Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> |
| Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> |
| Link: https://lore.kernel.org/r/20240105085530.14070-2-jorge.sanjuangarcia@duagon.com |
| Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/net/ethernet/ti/am65-cpsw-nuss.c | 5 +++-- |
| 1 file changed, 3 insertions(+), 2 deletions(-) |
| |
| diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c |
| index 24120605502f..c62b0f99f2bc 100644 |
| --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c |
| +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c |
| @@ -56,7 +56,7 @@ |
| #define AM65_CPSW_MAX_PORTS 8 |
| |
| #define AM65_CPSW_MIN_PACKET_SIZE VLAN_ETH_ZLEN |
| -#define AM65_CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) |
| +#define AM65_CPSW_MAX_PACKET_SIZE 2024 |
| |
| #define AM65_CPSW_REG_CTL 0x004 |
| #define AM65_CPSW_REG_STAT_PORT_EN 0x014 |
| @@ -2167,7 +2167,8 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) |
| eth_hw_addr_set(port->ndev, port->slave.mac_addr); |
| |
| port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE; |
| - port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE; |
| + port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE - |
| + (VLAN_ETH_HLEN + ETH_FCS_LEN); |
| port->ndev->hw_features = NETIF_F_SG | |
| NETIF_F_RXCSUM | |
| NETIF_F_HW_CSUM | |
| -- |
| 2.43.0 |
| |
