| From e96a5621e5fad280f586786b5f2353ba71ed9368 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 21 Aug 2024 07:51:36 +0200 |
| Subject: ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks |
| |
| From: Alexander Dahl <ada@thorsis.com> |
| |
| [ Upstream commit d355c895fa4ddd8bec15569eee540baeed7df8c5 ] |
| |
| The RTC and RTT peripherals use the timing domain slow clock (TD_SLCK), |
| sourced from the 32.768 kHz crystal oscillator or slow rc oscillator. |
| |
| The previously used Monitoring domain slow clock (MD_SLCK) is sourced |
| from an internal RC oscillator which is most probably not precise enough |
| for real time clock purposes. |
| |
| Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") |
| Fixes: 5f6b33f46346 ("ARM: dts: sam9x60: add rtt") |
| Signed-off-by: Alexander Dahl <ada@thorsis.com> |
| Link: https://lore.kernel.org/r/20240821055136.6858-1-ada@thorsis.com |
| [claudiu.beznea: removed () around the last commit description paragraph, |
| removed " in front of "timing domain slow clock", described that |
| TD_SLCK can also be sourced from slow rc oscillator] |
| Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm/boot/dts/microchip/sam9x60.dtsi | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi |
| index 73d570a172690..1705c96f4221e 100644 |
| --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi |
| +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi |
| @@ -1312,7 +1312,7 @@ rtt: rtc@fffffe20 { |
| compatible = "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt"; |
| reg = <0xfffffe20 0x20>; |
| interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| - clocks = <&clk32k 0>; |
| + clocks = <&clk32k 1>; |
| }; |
| |
| pit: timer@fffffe40 { |
| @@ -1338,7 +1338,7 @@ rtc: rtc@fffffea8 { |
| compatible = "microchip,sam9x60-rtc", "atmel,at91sam9x5-rtc"; |
| reg = <0xfffffea8 0x100>; |
| interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| - clocks = <&clk32k 0>; |
| + clocks = <&clk32k 1>; |
| }; |
| |
| watchdog: watchdog@ffffff80 { |
| -- |
| 2.43.0 |
| |
