| From foo@baz Fri Mar 29 15:53:50 CET 2019 |
| From: Michael Ellerman <mpe@ellerman.id.au> |
| Date: Fri, 29 Mar 2019 22:26:06 +1100 |
| Subject: powerpc/pseries: Query hypervisor for count cache flush settings |
| To: stable@vger.kernel.org, gregkh@linuxfoundation.org |
| Cc: linuxppc-dev@ozlabs.org, diana.craciun@nxp.com, msuchanek@suse.de, christophe.leroy@c-s.fr |
| Message-ID: <20190329112620.14489-19-mpe@ellerman.id.au> |
| |
| From: Michael Ellerman <mpe@ellerman.id.au> |
| |
| commit ba72dc171954b782a79d25e0f4b3ed91090c3b1e upstream. |
| |
| Use the existing hypercall to determine the appropriate settings for |
| the count cache flush, and then call the generic powerpc code to set |
| it up based on the security feature flags. |
| |
| Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/powerpc/include/asm/hvcall.h | 2 ++ |
| arch/powerpc/platforms/pseries/setup.c | 7 +++++++ |
| 2 files changed, 9 insertions(+) |
| |
| --- a/arch/powerpc/include/asm/hvcall.h |
| +++ b/arch/powerpc/include/asm/hvcall.h |
| @@ -340,10 +340,12 @@ |
| #define H_CPU_CHAR_BRANCH_HINTS_HONORED (1ull << 58) // IBM bit 5 |
| #define H_CPU_CHAR_THREAD_RECONFIG_CTRL (1ull << 57) // IBM bit 6 |
| #define H_CPU_CHAR_COUNT_CACHE_DISABLED (1ull << 56) // IBM bit 7 |
| +#define H_CPU_CHAR_BCCTR_FLUSH_ASSIST (1ull << 54) // IBM bit 9 |
| |
| #define H_CPU_BEHAV_FAVOUR_SECURITY (1ull << 63) // IBM bit 0 |
| #define H_CPU_BEHAV_L1D_FLUSH_PR (1ull << 62) // IBM bit 1 |
| #define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ull << 61) // IBM bit 2 |
| +#define H_CPU_BEHAV_FLUSH_COUNT_CACHE (1ull << 58) // IBM bit 5 |
| |
| /* Flag values used in H_REGISTER_PROC_TBL hcall */ |
| #define PROC_TABLE_OP_MASK 0x18 |
| --- a/arch/powerpc/platforms/pseries/setup.c |
| +++ b/arch/powerpc/platforms/pseries/setup.c |
| @@ -484,6 +484,12 @@ static void init_cpu_char_feature_flags( |
| if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) |
| security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); |
| |
| + if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) |
| + security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); |
| + |
| + if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) |
| + security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); |
| + |
| /* |
| * The features below are enabled by default, so we instead look to see |
| * if firmware has *disabled* them, and clear them if so. |
| @@ -534,6 +540,7 @@ void pseries_setup_rfi_flush(void) |
| security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); |
| |
| setup_rfi_flush(types, enable); |
| + setup_count_cache_flush(); |
| } |
| |
| static void __init pSeries_setup_arch(void) |