| From 814ba65f64f31e49513331a7227afbe9b882d187 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 23 Jan 2018 16:03:47 +0100 |
| Subject: ARM: dts: imx6q-bx50v3: Add internal switch |
| |
| From: Sebastian Reichel <sebastian.reichel@collabora.co.uk> |
| |
| [ Upstream commit e26dead442689a861358f33126210b0f8de615a9 ] |
| |
| B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to |
| communicate with a Marvell switch. On all devices the switch is |
| connected to a PCI based network card, which needs to be referenced |
| by DT, so this also adds the common PCI root node. |
| |
| Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> |
| Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> |
| Signed-off-by: David S. Miller <davem@davemloft.net> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm/boot/dts/imx6q-bx50v3.dtsi | 62 +++++++++++++++++++++++++++++ |
| 1 file changed, 62 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/imx6q-bx50v3.dtsi |
| index 1015e55ca8f7..8420378d095d 100644 |
| --- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi |
| +++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi |
| @@ -92,6 +92,56 @@ |
| mux-int-port = <1>; |
| mux-ext-port = <4>; |
| }; |
| + |
| + aliases { |
| + mdio-gpio0 = &mdio0; |
| + }; |
| + |
| + mdio0: mdio-gpio { |
| + compatible = "virtual,mdio-gpio"; |
| + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */ |
| + <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */ |
| + |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + |
| + switch@0 { |
| + compatible = "marvell,mv88e6085"; /* 88e6240*/ |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0>; |
| + |
| + switch_ports: ports { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + }; |
| + |
| + mdio { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + |
| + switchphy0: switchphy@0 { |
| + reg = <0>; |
| + }; |
| + |
| + switchphy1: switchphy@1 { |
| + reg = <1>; |
| + }; |
| + |
| + switchphy2: switchphy@2 { |
| + reg = <2>; |
| + }; |
| + |
| + switchphy3: switchphy@3 { |
| + reg = <3>; |
| + }; |
| + |
| + switchphy4: switchphy@4 { |
| + reg = <4>; |
| + }; |
| + }; |
| + }; |
| + }; |
| }; |
| |
| &ecspi5 { |
| @@ -326,3 +376,15 @@ |
| tcxo-clock-frequency = <26000000>; |
| }; |
| }; |
| + |
| +&pcie { |
| + /* Synopsys, Inc. Device */ |
| + pci_root: root@0,0 { |
| + compatible = "pci16c3,abcd"; |
| + reg = <0x00000000 0 0 0 0>; |
| + |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + #interrupt-cells = <1>; |
| + }; |
| +}; |
| -- |
| 2.25.1 |
| |