| From 851a15114895c5bce163a6f2d57e0aa4658a1be4 Mon Sep 17 00:00:00 2001 |
| From: Felipe Balbi <felipe.balbi@linux.intel.com> |
| Date: Mon, 3 Sep 2018 11:24:57 +0300 |
| Subject: i2c: i801: fix DNV's SMBCTRL register offset |
| |
| From: Felipe Balbi <felipe.balbi@linux.intel.com> |
| |
| commit 851a15114895c5bce163a6f2d57e0aa4658a1be4 upstream. |
| |
| DNV's iTCO is slightly different with SMBCTRL sitting at a different |
| offset when compared to all other devices. Let's fix so that we can |
| properly use iTCO watchdog. |
| |
| Fixes: 84d7f2ebd70d ("i2c: i801: Add support for Intel DNV") |
| Cc: <stable@vger.kernel.org> # v4.4+ |
| Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> |
| Reviewed-by: Jean Delvare <jdelvare@suse.de> |
| Signed-off-by: Wolfram Sang <wsa@the-dreams.de> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/i2c/busses/i2c-i801.c | 7 ++++++- |
| 1 file changed, 6 insertions(+), 1 deletion(-) |
| |
| --- a/drivers/i2c/busses/i2c-i801.c |
| +++ b/drivers/i2c/busses/i2c-i801.c |
| @@ -138,6 +138,7 @@ |
| |
| #define SBREG_BAR 0x10 |
| #define SBREG_SMBCTRL 0xc6000c |
| +#define SBREG_SMBCTRL_DNV 0xcf000c |
| |
| /* Host status bits for SMBPCISTS */ |
| #define SMBPCISTS_INTS BIT(3) |
| @@ -1395,7 +1396,11 @@ static void i801_add_tco(struct i801_pri |
| spin_unlock(&p2sb_spinlock); |
| |
| res = &tco_res[ICH_RES_MEM_OFF]; |
| - res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL; |
| + if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS) |
| + res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV; |
| + else |
| + res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL; |
| + |
| res->end = res->start + 3; |
| res->flags = IORESOURCE_MEM; |
| |
