| From 8da38ebaad23fe1b0c4a205438676f6356607cfc Mon Sep 17 00:00:00 2001 |
| From: Filippo Sironi <sironi@amazon.de> |
| Date: Tue, 31 Jul 2018 17:29:30 +0200 |
| Subject: x86/microcode: Update the new microcode revision unconditionally |
| |
| From: Filippo Sironi <sironi@amazon.de> |
| |
| commit 8da38ebaad23fe1b0c4a205438676f6356607cfc upstream. |
| |
| Handle the case where microcode gets loaded on the BSP's hyperthread |
| sibling first and the boot_cpu_data's microcode revision doesn't get |
| updated because of early exit due to the siblings sharing a microcode |
| engine. |
| |
| For that, simply write the updated revision on all CPUs unconditionally. |
| |
| Signed-off-by: Filippo Sironi <sironi@amazon.de> |
| Signed-off-by: Borislav Petkov <bp@suse.de> |
| Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
| Cc: prarit@redhat.com |
| Cc: stable@vger.kernel.org |
| Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| arch/x86/kernel/cpu/microcode/amd.c | 22 +++++++++++++--------- |
| arch/x86/kernel/cpu/microcode/intel.c | 13 ++++++++----- |
| 2 files changed, 21 insertions(+), 14 deletions(-) |
| |
| --- a/arch/x86/kernel/cpu/microcode/amd.c |
| +++ b/arch/x86/kernel/cpu/microcode/amd.c |
| @@ -504,6 +504,7 @@ static enum ucode_state apply_microcode_ |
| struct microcode_amd *mc_amd; |
| struct ucode_cpu_info *uci; |
| struct ucode_patch *p; |
| + enum ucode_state ret; |
| u32 rev, dummy; |
| |
| BUG_ON(raw_smp_processor_id() != cpu); |
| @@ -521,9 +522,8 @@ static enum ucode_state apply_microcode_ |
| |
| /* need to apply patch? */ |
| if (rev >= mc_amd->hdr.patch_id) { |
| - c->microcode = rev; |
| - uci->cpu_sig.rev = rev; |
| - return UCODE_OK; |
| + ret = UCODE_OK; |
| + goto out; |
| } |
| |
| if (__apply_microcode_amd(mc_amd)) { |
| @@ -531,17 +531,21 @@ static enum ucode_state apply_microcode_ |
| cpu, mc_amd->hdr.patch_id); |
| return UCODE_ERROR; |
| } |
| - pr_info("CPU%d: new patch_level=0x%08x\n", cpu, |
| - mc_amd->hdr.patch_id); |
| |
| - uci->cpu_sig.rev = mc_amd->hdr.patch_id; |
| - c->microcode = mc_amd->hdr.patch_id; |
| + rev = mc_amd->hdr.patch_id; |
| + ret = UCODE_UPDATED; |
| + |
| + pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); |
| + |
| +out: |
| + uci->cpu_sig.rev = rev; |
| + c->microcode = rev; |
| |
| /* Update boot_cpu_data's revision too, if we're on the BSP: */ |
| if (c->cpu_index == boot_cpu_data.cpu_index) |
| - boot_cpu_data.microcode = mc_amd->hdr.patch_id; |
| + boot_cpu_data.microcode = rev; |
| |
| - return UCODE_UPDATED; |
| + return ret; |
| } |
| |
| static int install_equiv_cpu_table(const u8 *buf) |
| --- a/arch/x86/kernel/cpu/microcode/intel.c |
| +++ b/arch/x86/kernel/cpu/microcode/intel.c |
| @@ -795,6 +795,7 @@ static enum ucode_state apply_microcode_ |
| struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
| struct cpuinfo_x86 *c = &cpu_data(cpu); |
| struct microcode_intel *mc; |
| + enum ucode_state ret; |
| static int prev_rev; |
| u32 rev; |
| |
| @@ -817,9 +818,8 @@ static enum ucode_state apply_microcode_ |
| */ |
| rev = intel_get_microcode_revision(); |
| if (rev >= mc->hdr.rev) { |
| - uci->cpu_sig.rev = rev; |
| - c->microcode = rev; |
| - return UCODE_OK; |
| + ret = UCODE_OK; |
| + goto out; |
| } |
| |
| /* |
| @@ -848,14 +848,17 @@ static enum ucode_state apply_microcode_ |
| prev_rev = rev; |
| } |
| |
| + ret = UCODE_UPDATED; |
| + |
| +out: |
| uci->cpu_sig.rev = rev; |
| - c->microcode = rev; |
| + c->microcode = rev; |
| |
| /* Update boot_cpu_data's revision too, if we're on the BSP: */ |
| if (c->cpu_index == boot_cpu_data.cpu_index) |
| boot_cpu_data.microcode = rev; |
| |
| - return UCODE_UPDATED; |
| + return ret; |
| } |
| |
| static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, |