| From 1e11b014271ceccb5ea04ae58f4829ac8209a86d Mon Sep 17 00:00:00 2001 |
| From: Daniel Lezcano <daniel.lezcano@linaro.org> |
| Date: Thu, 19 Oct 2017 19:05:49 +0200 |
| Subject: thermal/drivers/hisi: Encapsulate register writes into helpers |
| |
| From: Daniel Lezcano <daniel.lezcano@linaro.org> |
| |
| commit 1e11b014271ceccb5ea04ae58f4829ac8209a86d upstream. |
| |
| Hopefully, the function name can help to clarify the semantic of the operations |
| when writing in the register. |
| |
| Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> |
| Signed-off-by: Eduardo Valentin <edubezval@gmail.com> |
| Signed-off-by: Rafael David Tinoco <rafael.tinoco@linaro.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/thermal/hisi_thermal.c | 92 +++++++++++++++++++++++++++++++---------- |
| 1 file changed, 70 insertions(+), 22 deletions(-) |
| |
| --- a/drivers/thermal/hisi_thermal.c |
| +++ b/drivers/thermal/hisi_thermal.c |
| @@ -26,6 +26,7 @@ |
| |
| #include "thermal_core.h" |
| |
| +#define TEMP0_LAG (0x0) |
| #define TEMP0_TH (0x4) |
| #define TEMP0_RST_TH (0x8) |
| #define TEMP0_CFG (0xC) |
| @@ -96,6 +97,56 @@ static inline long hisi_thermal_round_te |
| hisi_thermal_temp_to_step(temp)); |
| } |
| |
| +static inline void hisi_thermal_set_lag(void __iomem *addr, int value) |
| +{ |
| + writel(value, addr + TEMP0_LAG); |
| +} |
| + |
| +static inline void hisi_thermal_alarm_clear(void __iomem *addr, int value) |
| +{ |
| + writel(value, addr + TEMP0_INT_CLR); |
| +} |
| + |
| +static inline void hisi_thermal_alarm_enable(void __iomem *addr, int value) |
| +{ |
| + writel(value, addr + TEMP0_INT_EN); |
| +} |
| + |
| +static inline void hisi_thermal_alarm_set(void __iomem *addr, int temp) |
| +{ |
| + writel(hisi_thermal_temp_to_step(temp) | 0x0FFFFFF00, addr + TEMP0_TH); |
| +} |
| + |
| +static inline void hisi_thermal_reset_set(void __iomem *addr, int temp) |
| +{ |
| + writel(hisi_thermal_temp_to_step(temp), addr + TEMP0_RST_TH); |
| +} |
| + |
| +static inline void hisi_thermal_reset_enable(void __iomem *addr, int value) |
| +{ |
| + writel(value, addr + TEMP0_RST_MSK); |
| +} |
| + |
| +static inline void hisi_thermal_enable(void __iomem *addr, int value) |
| +{ |
| + writel(value, addr + TEMP0_EN); |
| +} |
| + |
| +static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) |
| +{ |
| + writel((sensor << 12), addr + TEMP0_CFG); |
| +} |
| + |
| +static inline int hisi_thermal_get_temperature(void __iomem *addr) |
| +{ |
| + return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); |
| +} |
| + |
| +static inline void hisi_thermal_hdak_set(void __iomem *addr, int value) |
| +{ |
| + writel(value, addr + TEMP0_CFG); |
| +} |
| + |
| static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data, |
| struct hisi_thermal_sensor *sensor) |
| { |
| @@ -104,22 +155,21 @@ static long hisi_thermal_get_sensor_temp |
| mutex_lock(&data->thermal_lock); |
| |
| /* disable interrupt */ |
| - writel(0x0, data->regs + TEMP0_INT_EN); |
| - writel(0x1, data->regs + TEMP0_INT_CLR); |
| + hisi_thermal_alarm_enable(data->regs, 0); |
| + hisi_thermal_alarm_clear(data->regs, 1); |
| |
| /* disable module firstly */ |
| - writel(0x0, data->regs + TEMP0_EN); |
| + hisi_thermal_enable(data->regs, 0); |
| |
| /* select sensor id */ |
| - writel((sensor->id << 12), data->regs + TEMP0_CFG); |
| + hisi_thermal_sensor_select(data->regs, sensor->id); |
| |
| /* enable module */ |
| - writel(0x1, data->regs + TEMP0_EN); |
| + hisi_thermal_enable(data->regs, 1); |
| |
| usleep_range(3000, 5000); |
| |
| - val = readl(data->regs + TEMP0_VALUE); |
| - val = hisi_thermal_step_to_temp(val); |
| + val = hisi_thermal_get_temperature(data->regs); |
| |
| mutex_unlock(&data->thermal_lock); |
| |
| @@ -136,28 +186,26 @@ static void hisi_thermal_enable_bind_irq |
| sensor = &data->sensors; |
| |
| /* setting the hdak time */ |
| - writel(0x0, data->regs + TEMP0_CFG); |
| + hisi_thermal_hdak_set(data->regs, 0); |
| |
| /* disable module firstly */ |
| - writel(0x0, data->regs + TEMP0_RST_MSK); |
| - writel(0x0, data->regs + TEMP0_EN); |
| + hisi_thermal_reset_enable(data->regs, 0); |
| + hisi_thermal_enable(data->regs, 0); |
| |
| /* select sensor id */ |
| - writel((sensor->id << 12), data->regs + TEMP0_CFG); |
| + hisi_thermal_sensor_select(data->regs, sensor->id); |
| |
| /* enable for interrupt */ |
| - writel(hisi_thermal_temp_to_step(sensor->thres_temp) | 0x0FFFFFF00, |
| - data->regs + TEMP0_TH); |
| + hisi_thermal_alarm_set(data->regs, sensor->thres_temp); |
| |
| - writel(hisi_thermal_temp_to_step(HISI_TEMP_RESET), |
| - data->regs + TEMP0_RST_TH); |
| + hisi_thermal_reset_set(data->regs, HISI_TEMP_RESET); |
| |
| /* enable module */ |
| - writel(0x1, data->regs + TEMP0_RST_MSK); |
| - writel(0x1, data->regs + TEMP0_EN); |
| + hisi_thermal_reset_enable(data->regs, 1); |
| + hisi_thermal_enable(data->regs, 1); |
| |
| - writel(0x0, data->regs + TEMP0_INT_CLR); |
| - writel(0x1, data->regs + TEMP0_INT_EN); |
| + hisi_thermal_alarm_clear(data->regs, 0); |
| + hisi_thermal_alarm_enable(data->regs, 1); |
| |
| usleep_range(3000, 5000); |
| |
| @@ -169,9 +217,9 @@ static void hisi_thermal_disable_sensor( |
| mutex_lock(&data->thermal_lock); |
| |
| /* disable sensor module */ |
| - writel(0x0, data->regs + TEMP0_INT_EN); |
| - writel(0x0, data->regs + TEMP0_RST_MSK); |
| - writel(0x0, data->regs + TEMP0_EN); |
| + hisi_thermal_enable(data->regs, 0); |
| + hisi_thermal_alarm_enable(data->regs, 0); |
| + hisi_thermal_reset_enable(data->regs, 0); |
| |
| mutex_unlock(&data->thermal_lock); |
| } |