| From c0906d7564615cdc6ef9af4dc28cbc374e62bea2 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 28 Aug 2018 16:13:27 +0200 |
| Subject: arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 |
| |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| |
| [ Upstream commit 7a590fe317488783a229e5a80e91868942e8463f ] |
| |
| usb2_phy1 accidentally uses the same clock/reset as usb2_phy0. |
| |
| Fixes: b5857630a829a8d5 ("arm64: dts: renesas: r8a77965: add usb2_phy nodes") |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm64/boot/dts/renesas/r8a77965.dtsi | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi |
| index 2ccb1138cdf0c..f1dfd17413b9e 100644 |
| --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi |
| @@ -1479,9 +1479,9 @@ |
| compatible = "renesas,usb2-phy-r8a77965", |
| "renesas,rcar-gen3-usb2-phy"; |
| reg = <0 0xee0a0200 0 0x700>; |
| - clocks = <&cpg CPG_MOD 703>; |
| + clocks = <&cpg CPG_MOD 702>; |
| power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; |
| - resets = <&cpg 703>; |
| + resets = <&cpg 702>; |
| #phy-cells = <0>; |
| status = "disabled"; |
| }; |
| -- |
| 2.20.1 |
| |
