| From foo@baz Sun May 27 17:33:38 CEST 2018 |
| From: Guenter Roeck <linux@roeck-us.net> |
| Date: Sun, 24 Dec 2017 13:04:07 -0800 |
| Subject: watchdog: sp5100_tco: Fix watchdog disable bit |
| |
| From: Guenter Roeck <linux@roeck-us.net> |
| |
| [ Upstream commit f541c09ebfc61697b586b38c9ebaf4b70defb278 ] |
| |
| According to all published information, the watchdog disable bit for SB800 |
| compatible controllers is bit 1 of PM register 0x48, not bit 2. For the |
| most part that doesn't matter in practice, since the bit has to be cleared |
| to enable watchdog address decoding, which is the default setting, but it |
| still needs to be fixed. |
| |
| Cc: Zoltán Böszörményi <zboszor@pr.hu> |
| Signed-off-by: Guenter Roeck <linux@roeck-us.net> |
| Signed-off-by: Wim Van Sebroeck <wim@iguana.be> |
| Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/watchdog/sp5100_tco.h | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/watchdog/sp5100_tco.h |
| +++ b/drivers/watchdog/sp5100_tco.h |
| @@ -54,7 +54,7 @@ |
| #define SB800_PM_WATCHDOG_CONFIG 0x4C |
| |
| #define SB800_PCI_WATCHDOG_DECODE_EN (1 << 0) |
| -#define SB800_PM_WATCHDOG_DISABLE (1 << 2) |
| +#define SB800_PM_WATCHDOG_DISABLE (1 << 1) |
| #define SB800_PM_WATCHDOG_SECOND_RES (3 << 0) |
| #define SB800_ACPI_MMIO_DECODE_EN (1 << 0) |
| #define SB800_ACPI_MMIO_SEL (1 << 1) |
