| From d2ba856293cd3eeb44d6feb008a1ed5750322997 Mon Sep 17 00:00:00 2001 |
| From: Yan Zhao <yan.y.zhao@intel.com> |
| Date: Wed, 27 Mar 2019 00:55:45 -0400 |
| Subject: drm/i915/gvt: do not let pin count of shadow mm go negative |
| |
| [ Upstream commit 663a50ceac75c2208d2ad95365bc8382fd42f44d ] |
| |
| shadow mm's pin count got increased in workload preparation phase, which |
| is after workload scanning. |
| it will get decreased in complete_current_workload() anyway after |
| workload completion. |
| Sometimes, if a workload meets a scanning error, its shadow mm pin count |
| will not get increased but will get decreased in the end. |
| This patch lets shadow mm's pin count not go below 0. |
| |
| Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization") |
| Cc: zhenyuw@linux.intel.com |
| Cc: stable@vger.kernel.org #4.14+ |
| Signed-off-by: Yan Zhao <yan.y.zhao@intel.com> |
| Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/i915/gvt/gtt.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c |
| index c7103dd2d8d5..563ab8590061 100644 |
| --- a/drivers/gpu/drm/i915/gvt/gtt.c |
| +++ b/drivers/gpu/drm/i915/gvt/gtt.c |
| @@ -1942,7 +1942,7 @@ void _intel_vgpu_mm_release(struct kref *mm_ref) |
| */ |
| void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm) |
| { |
| - atomic_dec(&mm->pincount); |
| + atomic_dec_if_positive(&mm->pincount); |
| } |
| |
| /** |
| -- |
| 2.19.1 |
| |
