| From b273a6e683bc23bf65737f830a7933d3492b60c2 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 16 Apr 2021 02:51:13 -0500 |
| Subject: ARM: dts: aspeed: Update e3c246d4i vuart properties |
| |
| From: Zev Weiss <zev@bewilderbeest.net> |
| |
| [ Upstream commit 812bae32e5d50914f75a6e036d3bde39ca86b0c3 ] |
| |
| This device-tree was merged with a provisional vuart IRQ-polarity |
| property that was still under review and ended up taking a somewhat |
| different form. This patch updates it to match the final form of the |
| new vuart properties, which additionally allow specifying the SIRQ |
| number and LPC address. |
| |
| Signed-off-by: Zev Weiss <zev@bewilderbeest.net> |
| Reviewed-by: Andrew Jeffery <andrew@aj.id.au> |
| Fixes: ca03042f0f12 ("serial: 8250_aspeed_vuart: add aspeed, lpc-io-reg and aspeed, lpc-interrupts DT properties") |
| Reviewed-by: Joel Stanley <joel@jms.id.au> |
| Link: https://lore.kernel.org/r/20210416075113.18047-1-zev@bewilderbeest.net |
| Signed-off-by: Joel Stanley <joel@jms.id.au> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 4 +++- |
| 1 file changed, 3 insertions(+), 1 deletion(-) |
| |
| diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts |
| index dcab6e78dfa4..8be40c8283af 100644 |
| --- a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts |
| +++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts |
| @@ -4,6 +4,7 @@ |
| #include "aspeed-g5.dtsi" |
| #include <dt-bindings/gpio/aspeed-gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| +#include <dt-bindings/interrupt-controller/irq.h> |
| |
| /{ |
| model = "ASRock E3C246D4I BMC"; |
| @@ -73,7 +74,8 @@ |
| |
| &vuart { |
| status = "okay"; |
| - aspeed,sirq-active-high; |
| + aspeed,lpc-io-reg = <0x2f8>; |
| + aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| &mac0 { |
| -- |
| 2.30.2 |
| |
