| From 56f6f4c4eb2a710ec8878dd9373d3d2b2eb75f5c Mon Sep 17 00:00:00 2001 |
| From: Bhaumik Bhatt <bbhatt@codeaurora.org> |
| Date: Fri, 16 Jul 2021 13:21:04 +0530 |
| Subject: bus: mhi: pci_generic: Apply no-op for wake using sideband wake boolean |
| |
| From: Bhaumik Bhatt <bbhatt@codeaurora.org> |
| |
| commit 56f6f4c4eb2a710ec8878dd9373d3d2b2eb75f5c upstream. |
| |
| Devices such as SDX24 do not have the provision for inband wake |
| doorbell in the form of channel 127 and instead have a sideband |
| GPIO for it. Newer devices such as SDX55 or SDX65 support inband |
| wake method by default. Ensure the functionality is used based on |
| this such that device wake stays held when a client driver uses |
| mhi_device_get() API or the equivalent debugfs entry. |
| |
| Link: https://lore.kernel.org/r/1624560809-30610-1-git-send-email-bbhatt@codeaurora.org |
| Fixes: e3e5e6508fc1 ("bus: mhi: pci_generic: No-Op for device_wake operations") |
| Cc: stable@vger.kernel.org #5.12 |
| Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> |
| Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| Link: https://lore.kernel.org/r/20210716075106.49938-2-manivannan.sadhasivam@linaro.org |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/bus/mhi/pci_generic.c | 27 +++++++++++++++++++-------- |
| 1 file changed, 19 insertions(+), 8 deletions(-) |
| |
| --- a/drivers/bus/mhi/pci_generic.c |
| +++ b/drivers/bus/mhi/pci_generic.c |
| @@ -32,6 +32,8 @@ |
| * @edl: emergency download mode firmware path (if any) |
| * @bar_num: PCI base address register to use for MHI MMIO register space |
| * @dma_data_width: DMA transfer word size (32 or 64 bits) |
| + * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead |
| + * of inband wake support (such as sdx24) |
| */ |
| struct mhi_pci_dev_info { |
| const struct mhi_controller_config *config; |
| @@ -40,6 +42,7 @@ struct mhi_pci_dev_info { |
| const char *edl; |
| unsigned int bar_num; |
| unsigned int dma_data_width; |
| + bool sideband_wake; |
| }; |
| |
| #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ |
| @@ -242,7 +245,8 @@ static const struct mhi_pci_dev_info mhi |
| .edl = "qcom/sdx65m/edl.mbn", |
| .config = &modem_qcom_v1_mhiv_config, |
| .bar_num = MHI_PCI_DEFAULT_BAR_NUM, |
| - .dma_data_width = 32 |
| + .dma_data_width = 32, |
| + .sideband_wake = false, |
| }; |
| |
| static const struct mhi_pci_dev_info mhi_qcom_sdx55_info = { |
| @@ -251,7 +255,8 @@ static const struct mhi_pci_dev_info mhi |
| .edl = "qcom/sdx55m/edl.mbn", |
| .config = &modem_qcom_v1_mhiv_config, |
| .bar_num = MHI_PCI_DEFAULT_BAR_NUM, |
| - .dma_data_width = 32 |
| + .dma_data_width = 32, |
| + .sideband_wake = false, |
| }; |
| |
| static const struct mhi_pci_dev_info mhi_qcom_sdx24_info = { |
| @@ -259,7 +264,8 @@ static const struct mhi_pci_dev_info mhi |
| .edl = "qcom/prog_firehose_sdx24.mbn", |
| .config = &modem_qcom_v1_mhiv_config, |
| .bar_num = MHI_PCI_DEFAULT_BAR_NUM, |
| - .dma_data_width = 32 |
| + .dma_data_width = 32, |
| + .sideband_wake = true, |
| }; |
| |
| static const struct mhi_channel_config mhi_quectel_em1xx_channels[] = { |
| @@ -301,7 +307,8 @@ static const struct mhi_pci_dev_info mhi |
| .edl = "qcom/prog_firehose_sdx24.mbn", |
| .config = &modem_quectel_em1xx_config, |
| .bar_num = MHI_PCI_DEFAULT_BAR_NUM, |
| - .dma_data_width = 32 |
| + .dma_data_width = 32, |
| + .sideband_wake = true, |
| }; |
| |
| static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { |
| @@ -339,7 +346,8 @@ static const struct mhi_pci_dev_info mhi |
| .edl = "qcom/sdx55m/edl.mbn", |
| .config = &modem_foxconn_sdx55_config, |
| .bar_num = MHI_PCI_DEFAULT_BAR_NUM, |
| - .dma_data_width = 32 |
| + .dma_data_width = 32, |
| + .sideband_wake = false, |
| }; |
| |
| static const struct pci_device_id mhi_pci_id_table[] = { |
| @@ -640,9 +648,12 @@ static int mhi_pci_probe(struct pci_dev |
| mhi_cntrl->status_cb = mhi_pci_status_cb; |
| mhi_cntrl->runtime_get = mhi_pci_runtime_get; |
| mhi_cntrl->runtime_put = mhi_pci_runtime_put; |
| - mhi_cntrl->wake_get = mhi_pci_wake_get_nop; |
| - mhi_cntrl->wake_put = mhi_pci_wake_put_nop; |
| - mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop; |
| + |
| + if (info->sideband_wake) { |
| + mhi_cntrl->wake_get = mhi_pci_wake_get_nop; |
| + mhi_cntrl->wake_put = mhi_pci_wake_put_nop; |
| + mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop; |
| + } |
| |
| err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width)); |
| if (err) |