| From 5a1813dbcef53a4db8b30ff3745d3feb08de5694 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Sun, 18 Jul 2021 13:38:34 -0700 |
| Subject: net: hisilicon: rename CACHE_LINE_MASK to avoid redefinition |
| |
| From: Randy Dunlap <rdunlap@infradead.org> |
| |
| [ Upstream commit b16f3299ae1aa3c327e1fb742d0379ae4d6e86f2 ] |
| |
| Building on ARCH=arc causes a "redefined" warning, so rename this |
| driver's CACHE_LINE_MASK to avoid the warning. |
| |
| ../drivers/net/ethernet/hisilicon/hip04_eth.c:134: warning: "CACHE_LINE_MASK" redefined |
| 134 | #define CACHE_LINE_MASK 0x3F |
| In file included from ../include/linux/cache.h:6, |
| from ../include/linux/printk.h:9, |
| from ../include/linux/kernel.h:19, |
| from ../include/linux/list.h:9, |
| from ../include/linux/module.h:12, |
| from ../drivers/net/ethernet/hisilicon/hip04_eth.c:7: |
| ../arch/arc/include/asm/cache.h:17: note: this is the location of the previous definition |
| 17 | #define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1)) |
| |
| Fixes: d413779cdd93 ("net: hisilicon: Add an tx_desc to adapt HI13X1_GMAC") |
| Signed-off-by: Randy Dunlap <rdunlap@infradead.org> |
| Cc: Vineet Gupta <vgupta@synopsys.com> |
| Cc: Jiangfeng Xiao <xiaojiangfeng@huawei.com> |
| Cc: "David S. Miller" <davem@davemloft.net> |
| Cc: Jakub Kicinski <kuba@kernel.org> |
| Signed-off-by: David S. Miller <davem@davemloft.net> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/net/ethernet/hisilicon/hip04_eth.c | 6 +++--- |
| 1 file changed, 3 insertions(+), 3 deletions(-) |
| |
| diff --git a/drivers/net/ethernet/hisilicon/hip04_eth.c b/drivers/net/ethernet/hisilicon/hip04_eth.c |
| index 12f6c2442a7a..e53512f6878a 100644 |
| --- a/drivers/net/ethernet/hisilicon/hip04_eth.c |
| +++ b/drivers/net/ethernet/hisilicon/hip04_eth.c |
| @@ -131,7 +131,7 @@ |
| /* buf unit size is cache_line_size, which is 64, so the shift is 6 */ |
| #define PPE_BUF_SIZE_SHIFT 6 |
| #define PPE_TX_BUF_HOLD BIT(31) |
| -#define CACHE_LINE_MASK 0x3F |
| +#define SOC_CACHE_LINE_MASK 0x3F |
| #else |
| #define PPE_CFG_QOS_VMID_GRP_SHIFT 8 |
| #define PPE_CFG_RX_CTRL_ALIGN_SHIFT 11 |
| @@ -531,8 +531,8 @@ hip04_mac_start_xmit(struct sk_buff *skb, struct net_device *ndev) |
| #if defined(CONFIG_HI13X1_GMAC) |
| desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB | TX_FINISH_CACHE_INV |
| | TX_RELEASE_TO_PPE | priv->port << TX_POOL_SHIFT); |
| - desc->data_offset = (__force u32)cpu_to_be32(phys & CACHE_LINE_MASK); |
| - desc->send_addr = (__force u32)cpu_to_be32(phys & ~CACHE_LINE_MASK); |
| + desc->data_offset = (__force u32)cpu_to_be32(phys & SOC_CACHE_LINE_MASK); |
| + desc->send_addr = (__force u32)cpu_to_be32(phys & ~SOC_CACHE_LINE_MASK); |
| #else |
| desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB | TX_FINISH_CACHE_INV); |
| desc->send_addr = (__force u32)cpu_to_be32(phys); |
| -- |
| 2.30.2 |
| |