| From 27d9f264e5ee66bb728a41f13582a6cc59ba2536 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 30 Sep 2020 13:57:54 -0400 |
| Subject: drm/amd/display: Avoid set zero in the requested clk |
| |
| From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
| |
| [ Upstream commit 2f8be0e516803cc3fd87c1671247896571a5a8fb ] |
| |
| [Why] |
| Sometimes CRTCs can be disabled due to display unplugging or temporarily |
| transition in the userspace; in these circumstances, DCE tries to set |
| the minimum clock threshold. When we have this situation, the function |
| bw_calcs is invoked with number_of_displays set to zero, making DCE set |
| dispclk_khz and sclk_khz to zero. For these reasons, we have seen some |
| ATOM bios errors that look like: |
| |
| [drm:atom_op_jump [amdgpu]] *ERROR* atombios stuck in loop for more than |
| 5secs aborting |
| [drm:amdgpu_atom_execute_table_locked [amdgpu]] *ERROR* atombios stuck |
| executing EA8A (len 761, WS 0, PS 0) @ 0xEABA |
| |
| [How] |
| This error happens due to an attempt to optimize the bandwidth using the |
| sclk, and the dispclk clock set to zero. Technically we handle this in |
| the function dce112_set_clock, but we are not considering the case that |
| this value is set to zero. This commit fixes this issue by ensuring that |
| we never set a minimum value below the minimum clock threshold. |
| |
| Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
| Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
| Acked-by: Eryk Brol <eryk.brol@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c | 3 +-- |
| 1 file changed, 1 insertion(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c |
| index d031bd3d30724..807dca8f7d7aa 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c |
| +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c |
| @@ -79,8 +79,7 @@ int dce112_set_clock(struct clk_mgr *clk_mgr_base, int requested_clk_khz) |
| memset(&dce_clk_params, 0, sizeof(dce_clk_params)); |
| |
| /* Make sure requested clock isn't lower than minimum threshold*/ |
| - if (requested_clk_khz > 0) |
| - requested_clk_khz = max(requested_clk_khz, |
| + requested_clk_khz = max(requested_clk_khz, |
| clk_mgr_dce->base.dentist_vco_freq_khz / 62); |
| |
| dce_clk_params.target_clock_frequency = requested_clk_khz; |
| -- |
| 2.27.0 |
| |
