| From ea66d3f1d7467b31a4d9f51fd46c545c12b3210b Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 20 Aug 2020 14:26:07 -0400 |
| Subject: drm/amd/display: Check clock table return |
| |
| From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
| |
| [ Upstream commit 4b4f21ff7f5d11bb77e169b306dcbc5b216f5db5 ] |
| |
| During the load processes for Renoir, our display code needs to retrieve |
| the SMU clock and voltage table, however, this operation can fail which |
| means that we have to check this scenario. Currently, we are not |
| handling this case properly and as a result, we have seen the following |
| dmesg log during the boot: |
| |
| RIP: 0010:rn_clk_mgr_construct+0x129/0x3d0 [amdgpu] |
| ... |
| Call Trace: |
| dc_clk_mgr_create+0x16a/0x1b0 [amdgpu] |
| dc_create+0x231/0x760 [amdgpu] |
| |
| This commit fixes this issue by checking the return status retrieved |
| from the clock table before try to populate any bandwidth. |
| |
| Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
| Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 7 +++++-- |
| 1 file changed, 5 insertions(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c |
| index 21a3073c8929e..2f8fee05547ac 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c |
| +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c |
| @@ -761,6 +761,7 @@ void rn_clk_mgr_construct( |
| { |
| struct dc_debug_options *debug = &ctx->dc->debug; |
| struct dpm_clocks clock_table = { 0 }; |
| + enum pp_smu_status status = 0; |
| |
| clk_mgr->base.ctx = ctx; |
| clk_mgr->base.funcs = &dcn21_funcs; |
| @@ -817,8 +818,10 @@ void rn_clk_mgr_construct( |
| clk_mgr->base.bw_params = &rn_bw_params; |
| |
| if (pp_smu && pp_smu->rn_funcs.get_dpm_clock_table) { |
| - pp_smu->rn_funcs.get_dpm_clock_table(&pp_smu->rn_funcs.pp_smu, &clock_table); |
| - if (ctx->dc_bios && ctx->dc_bios->integrated_info) { |
| + status = pp_smu->rn_funcs.get_dpm_clock_table(&pp_smu->rn_funcs.pp_smu, &clock_table); |
| + |
| + if (status == PP_SMU_RESULT_OK && |
| + ctx->dc_bios && ctx->dc_bios->integrated_info) { |
| rn_clk_mgr_helper_populate_bw_params (clk_mgr->base.bw_params, &clock_table, ctx->dc_bios->integrated_info); |
| } |
| } |
| -- |
| 2.27.0 |
| |