| From 0d142232d9436acab3578ee995472f58adcbf201 Mon Sep 17 00:00:00 2001 |
| From: Likun Gao <Likun.Gao@amd.com> |
| Date: Thu, 15 Oct 2020 10:48:15 +0800 |
| Subject: drm/amdgpu: update golden setting for sienna_cichlid |
| |
| From: Likun Gao <Likun.Gao@amd.com> |
| |
| commit 0d142232d9436acab3578ee995472f58adcbf201 upstream. |
| |
| Update golden setting for sienna_cichlid. |
| |
| Signed-off-by: Likun Gao <Likun.Gao@amd.com> |
| Acked-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Cc: stable@vger.kernel.org # 5.9.x |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 + |
| 1 file changed, 1 insertion(+) |
| |
| --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c |
| +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c |
| @@ -3091,6 +3091,7 @@ static const struct soc15_reg_golden gol |
| SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf), |
| SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008), |
| SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x10f80988), |
| + SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x00000020, 0x00000020), |
| SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007), |
| SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800), |
| SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000820), |