| From de5e20121d4dc8e3fcd3c892d2c8b3fc38687102 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 1 Jul 2020 21:42:34 +0200 |
| Subject: drm/bridge/synopsys: dsi: add support for non-continuous HS clock |
| |
| From: Antonio Borneo <antonio.borneo@st.com> |
| |
| [ Upstream commit c6d94e37bdbb6dfe7e581e937a915ab58399b8a5 ] |
| |
| Current code enables the HS clock when video mode is started or to |
| send out a HS command, and disables the HS clock to send out a LP |
| command. This is not what DSI spec specify. |
| |
| Enable HS clock either in command and in video mode. |
| Set automatic HS clock management for panels and devices that |
| support non-continuous HS clock. |
| |
| Signed-off-by: Antonio Borneo <antonio.borneo@st.com> |
| Tested-by: Philippe Cornu <philippe.cornu@st.com> |
| Reviewed-by: Philippe Cornu <philippe.cornu@st.com> |
| Acked-by: Neil Armstrong <narmstrong@baylibre.com> |
| Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
| Link: https://patchwork.freedesktop.org/patch/msgid/20200701194234.18123-1-yannick.fertre@st.com |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 9 +++++++-- |
| 1 file changed, 7 insertions(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c |
| index d580b2aa4ce98..979acaa90d002 100644 |
| --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c |
| +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c |
| @@ -365,7 +365,6 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, |
| if (lpm) |
| val |= CMD_MODE_ALL_LP; |
| |
| - dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); |
| dsi_write(dsi, DSI_CMD_MODE_CFG, val); |
| } |
| |
| @@ -541,16 +540,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) |
| static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, |
| unsigned long mode_flags) |
| { |
| + u32 val; |
| + |
| dsi_write(dsi, DSI_PWR_UP, RESET); |
| |
| if (mode_flags & MIPI_DSI_MODE_VIDEO) { |
| dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); |
| dw_mipi_dsi_video_mode_config(dsi); |
| - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); |
| } else { |
| dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); |
| } |
| |
| + val = PHY_TXREQUESTCLKHS; |
| + if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) |
| + val |= AUTO_CLKLANE_CTRL; |
| + dsi_write(dsi, DSI_LPCLK_CTRL, val); |
| + |
| dsi_write(dsi, DSI_PWR_UP, POWERUP); |
| } |
| |
| -- |
| 2.27.0 |
| |