| From 1f53251e8f005d3902d370831a9e4a011dfaca91 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 6 Aug 2020 14:57:34 -0700 |
| Subject: PCI/ACPI: Add Ampere Altra SOC MCFG quirk |
| |
| From: Tuan Phan <tuanphan@os.amperecomputing.com> |
| |
| [ Upstream commit 877c1a5f79c6984bbe3f2924234c08e2f4f1acd5 ] |
| |
| Ampere Altra SOC supports only 32-bit ECAM reads. Add an MCFG quirk for |
| the platform. |
| |
| Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.com |
| Signed-off-by: Tuan Phan <tuanphan@os.amperecomputing.com> |
| Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/acpi/pci_mcfg.c | 20 ++++++++++++++++++++ |
| drivers/pci/ecam.c | 10 ++++++++++ |
| include/linux/pci-ecam.h | 1 + |
| 3 files changed, 31 insertions(+) |
| |
| diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c |
| index 54b36b7ad47d9..e526571e0ebdb 100644 |
| --- a/drivers/acpi/pci_mcfg.c |
| +++ b/drivers/acpi/pci_mcfg.c |
| @@ -142,6 +142,26 @@ static struct mcfg_fixup mcfg_quirks[] = { |
| XGENE_V2_ECAM_MCFG(4, 0), |
| XGENE_V2_ECAM_MCFG(4, 1), |
| XGENE_V2_ECAM_MCFG(4, 2), |
| + |
| +#define ALTRA_ECAM_QUIRK(rev, seg) \ |
| + { "Ampere", "Altra ", rev, seg, MCFG_BUS_ANY, &pci_32b_read_ops } |
| + |
| + ALTRA_ECAM_QUIRK(1, 0), |
| + ALTRA_ECAM_QUIRK(1, 1), |
| + ALTRA_ECAM_QUIRK(1, 2), |
| + ALTRA_ECAM_QUIRK(1, 3), |
| + ALTRA_ECAM_QUIRK(1, 4), |
| + ALTRA_ECAM_QUIRK(1, 5), |
| + ALTRA_ECAM_QUIRK(1, 6), |
| + ALTRA_ECAM_QUIRK(1, 7), |
| + ALTRA_ECAM_QUIRK(1, 8), |
| + ALTRA_ECAM_QUIRK(1, 9), |
| + ALTRA_ECAM_QUIRK(1, 10), |
| + ALTRA_ECAM_QUIRK(1, 11), |
| + ALTRA_ECAM_QUIRK(1, 12), |
| + ALTRA_ECAM_QUIRK(1, 13), |
| + ALTRA_ECAM_QUIRK(1, 14), |
| + ALTRA_ECAM_QUIRK(1, 15), |
| }; |
| |
| static char mcfg_oem_id[ACPI_OEM_ID_SIZE]; |
| diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c |
| index 8f065a42fc1a2..b54d32a316693 100644 |
| --- a/drivers/pci/ecam.c |
| +++ b/drivers/pci/ecam.c |
| @@ -168,4 +168,14 @@ const struct pci_ecam_ops pci_32b_ops = { |
| .write = pci_generic_config_write32, |
| } |
| }; |
| + |
| +/* ECAM ops for 32-bit read only (non-compliant) */ |
| +const struct pci_ecam_ops pci_32b_read_ops = { |
| + .bus_shift = 20, |
| + .pci_ops = { |
| + .map_bus = pci_ecam_map_bus, |
| + .read = pci_generic_config_read32, |
| + .write = pci_generic_config_write, |
| + } |
| +}; |
| #endif |
| diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h |
| index 1af5cb02ef7f9..033ce74f02e81 100644 |
| --- a/include/linux/pci-ecam.h |
| +++ b/include/linux/pci-ecam.h |
| @@ -51,6 +51,7 @@ extern const struct pci_ecam_ops pci_generic_ecam_ops; |
| |
| #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) |
| extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */ |
| +extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */ |
| extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */ |
| extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */ |
| extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ |
| -- |
| 2.27.0 |
| |