| From b985735be7afea3a5e0570ce2ea0b662c0e12e19 Mon Sep 17 00:00:00 2001 |
| From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| Date: Tue, 7 Mar 2017 15:14:48 +0100 |
| Subject: hwrng: omap - Do not access INTMASK_REG on EIP76 |
| |
| From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| |
| commit b985735be7afea3a5e0570ce2ea0b662c0e12e19 upstream. |
| |
| The INTMASK_REG register does not exist on EIP76. Due to this, the call: |
| |
| omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK); |
| |
| ends up, through the reg_map_eip76[] array, in accessing the register at |
| offset 0, which is the RNG_OUTPUT_0_REG. This by itself doesn't cause |
| any problem, but clearly doesn't enable the interrupt as it was |
| expected. |
| |
| On EIP76, the register that allows to enable the interrupt is |
| RNG_CONTROL_REG. And just like RNG_INTMASK_REG, it's bit 1 of this |
| register that allows to enable the shutdown_oflo interrupt. |
| |
| Fixes: 383212425c926 ("hwrng: omap - Add device variant for SafeXcel IP-76 found in Armada 8K") |
| Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/char/hw_random/omap-rng.c | 13 ++++++++++++- |
| 1 file changed, 12 insertions(+), 1 deletion(-) |
| |
| --- a/drivers/char/hw_random/omap-rng.c |
| +++ b/drivers/char/hw_random/omap-rng.c |
| @@ -408,7 +408,18 @@ static int of_get_omap_rng_device_detail |
| "err = %d\n", err); |
| } |
| |
| - omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK); |
| + /* |
| + * On OMAP4, enabling the shutdown_oflo interrupt is |
| + * done in the interrupt mask register. There is no |
| + * such register on EIP76, and it's enabled by the |
| + * same bit in the control register |
| + */ |
| + if (priv->pdata->regs[RNG_INTMASK_REG]) |
| + omap_rng_write(priv, RNG_INTMASK_REG, |
| + RNG_SHUTDOWN_OFLO_MASK); |
| + else |
| + omap_rng_write(priv, RNG_CONTROL_REG, |
| + RNG_SHUTDOWN_OFLO_MASK); |
| } |
| return 0; |
| } |