| From 93b23055139428192e95f78d236a875cafee6e74 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 26 Mar 2026 17:02:34 +0000 |
| Subject: dt-bindings: gpio: fix microchip #interrupt-cells |
| |
| From: Jamie Gibbons <jamie.gibbons@microchip.com> |
| |
| [ Upstream commit 6b5ef8c88854b343b733b574ea8754c9dab61f41 ] |
| |
| The GPIO controller on PolarFire SoC supports more than one type of |
| interrupt and needs two interrupt cells. |
| |
| Fixes: 735806d8a68e9 ("dt-bindings: gpio: add bindings for microchip mpfs gpio") |
| Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> |
| Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
| Link: https://patch.msgid.link/20260326-wise-gumdrop-49217723a72a@spud |
| Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| .../devicetree/bindings/gpio/microchip,mpfs-gpio.yaml | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml |
| index d78da7dd2a566..dafd80bdd23aa 100644 |
| --- a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml |
| +++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml |
| @@ -34,7 +34,7 @@ properties: |
| const: 2 |
| |
| "#interrupt-cells": |
| - const: 1 |
| + const: 2 |
| |
| ngpios: |
| description: |
| @@ -83,7 +83,7 @@ examples: |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| - #interrupt-cells = <1>; |
| + #interrupt-cells = <2>; |
| interrupts = <53>, <53>, <53>, <53>, |
| <53>, <53>, <53>, <53>, |
| <53>, <53>, <53>, <53>, |
| -- |
| 2.53.0 |
| |
