| From c8d15edc17d836686d1f071e564800e1a2724fa6 Mon Sep 17 00:00:00 2001 |
| From: Alex Deucher <alexander.deucher@amd.com> |
| Date: Tue, 31 Jul 2012 11:01:10 -0400 |
| Subject: drm/radeon: fix bank tiling parameters on evergreen |
| |
| From: Alex Deucher <alexander.deucher@amd.com> |
| |
| commit c8d15edc17d836686d1f071e564800e1a2724fa6 upstream. |
| |
| Handle the 16 bank case. |
| |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/radeon/evergreen.c | 14 +++++++++++--- |
| 1 file changed, 11 insertions(+), 3 deletions(-) |
| |
| --- a/drivers/gpu/drm/radeon/evergreen.c |
| +++ b/drivers/gpu/drm/radeon/evergreen.c |
| @@ -2085,10 +2085,18 @@ static void evergreen_gpu_init(struct ra |
| if (rdev->flags & RADEON_IS_IGP) |
| rdev->config.evergreen.tile_config |= 1 << 4; |
| else { |
| - if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) |
| - rdev->config.evergreen.tile_config |= 1 << 4; |
| - else |
| + switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { |
| + case 0: /* four banks */ |
| rdev->config.evergreen.tile_config |= 0 << 4; |
| + break; |
| + case 1: /* eight banks */ |
| + rdev->config.evergreen.tile_config |= 1 << 4; |
| + break; |
| + case 2: /* sixteen banks */ |
| + default: |
| + rdev->config.evergreen.tile_config |= 2 << 4; |
| + break; |
| + } |
| } |
| rdev->config.evergreen.tile_config |= |
| ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; |
