blob: 51fb635d7e9997eed9ade290199a64ac264800f9 [file] [log] [blame]
From e058c945e03a629c99606452a6931f632dd28903 Mon Sep 17 00:00:00 2001
From: Jim Bride <jim.bride@linux.intel.com>
Date: Wed, 27 May 2015 10:21:48 -0700
Subject: drm/i915/hsw: Fix workaround for server AUX channel clock divisor
From: Jim Bride <jim.bride@linux.intel.com>
commit e058c945e03a629c99606452a6931f632dd28903 upstream.
According to the HSW b-spec we need to try clock divisors of 63
and 72, each 3 or more times, when attempting DP AUX channel
communication on a server chipset. This actually wasn't happening
due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit
in status rather than checking that the operation was done and
that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set.
[v2] Implemented alternate solution suggested by Jani Nikula.
Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/gpu/drm/i915/intel_dp.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -881,10 +881,8 @@ intel_dp_aux_ch(struct intel_dp *intel_d
DP_AUX_CH_CTL_RECEIVE_ERROR))
continue;
if (status & DP_AUX_CH_CTL_DONE)
- break;
+ goto done;
}
- if (status & DP_AUX_CH_CTL_DONE)
- break;
}
if ((status & DP_AUX_CH_CTL_DONE) == 0) {
@@ -893,6 +891,7 @@ intel_dp_aux_ch(struct intel_dp *intel_d
goto out;
}
+done:
/* Check for timeout or receive error.
* Timeouts occur when the sink is not connected
*/