| From foo@baz Sun Nov 22 12:00:04 PM CET 2020 |
| From: Aya Levin <ayal@nvidia.com> |
| Date: Wed, 18 Nov 2020 10:19:22 +0200 |
| Subject: net/mlx4_core: Fix init_hca fields offset |
| |
| From: Aya Levin <ayal@nvidia.com> |
| |
| [ Upstream commit 6d9c8d15af0ef20a66a0b432cac0d08319920602 ] |
| |
| Slave function read the following capabilities from the wrong offset: |
| 1. log_mc_entry_sz |
| 2. fs_log_entry_sz |
| 3. log_mc_hash_sz |
| |
| Fix that by adjusting these capabilities offset to match firmware |
| layout. |
| |
| Due to the wrong offset read, the following issues might occur: |
| 1+2. Negative value reported at max_mcast_qp_attach. |
| 3. Driver to init FW with multicast hash size of zero. |
| |
| Fixes: a40ded604365 ("net/mlx4_core: Add masking for a few queries on HCA caps") |
| Signed-off-by: Aya Levin <ayal@nvidia.com> |
| Reviewed-by: Moshe Shemesh <moshe@nvidia.com> |
| Reviewed-by: Eran Ben Elisha <eranbe@nvidia.com> |
| Signed-off-by: Tariq Toukan <tariqt@nvidia.com> |
| Link: https://lore.kernel.org/r/20201118081922.553-1-tariqt@nvidia.com |
| Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/net/ethernet/mellanox/mlx4/fw.c | 6 +++--- |
| drivers/net/ethernet/mellanox/mlx4/fw.h | 4 ++-- |
| 2 files changed, 5 insertions(+), 5 deletions(-) |
| |
| --- a/drivers/net/ethernet/mellanox/mlx4/fw.c |
| +++ b/drivers/net/ethernet/mellanox/mlx4/fw.c |
| @@ -1861,8 +1861,8 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, |
| #define INIT_HCA_LOG_RD_OFFSET (INIT_HCA_QPC_OFFSET + 0x77) |
| #define INIT_HCA_MCAST_OFFSET 0x0c0 |
| #define INIT_HCA_MC_BASE_OFFSET (INIT_HCA_MCAST_OFFSET + 0x00) |
| -#define INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x12) |
| -#define INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x16) |
| +#define INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x13) |
| +#define INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x17) |
| #define INIT_HCA_UC_STEERING_OFFSET (INIT_HCA_MCAST_OFFSET + 0x18) |
| #define INIT_HCA_LOG_MC_TABLE_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x1b) |
| #define INIT_HCA_DEVICE_MANAGED_FLOW_STEERING_EN 0x6 |
| @@ -1870,7 +1870,7 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, |
| #define INIT_HCA_DRIVER_VERSION_SZ 0x40 |
| #define INIT_HCA_FS_PARAM_OFFSET 0x1d0 |
| #define INIT_HCA_FS_BASE_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x00) |
| -#define INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x12) |
| +#define INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x13) |
| #define INIT_HCA_FS_A0_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x18) |
| #define INIT_HCA_FS_LOG_TABLE_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x1b) |
| #define INIT_HCA_FS_ETH_BITS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x21) |
| --- a/drivers/net/ethernet/mellanox/mlx4/fw.h |
| +++ b/drivers/net/ethernet/mellanox/mlx4/fw.h |
| @@ -182,8 +182,8 @@ struct mlx4_init_hca_param { |
| u64 cmpt_base; |
| u64 mtt_base; |
| u64 global_caps; |
| - u16 log_mc_entry_sz; |
| - u16 log_mc_hash_sz; |
| + u8 log_mc_entry_sz; |
| + u8 log_mc_hash_sz; |
| u16 hca_core_clock; /* Internal Clock Frequency (in MHz) */ |
| u8 log_num_qps; |
| u8 log_num_srqs; |
