| From 34511dce4b35685d3988d5c8b100d11a068db5bd Mon Sep 17 00:00:00 2001 |
| From: Mika Kahola <mika.kahola@intel.com> |
| Date: Mon, 20 Jun 2016 11:10:26 +0300 |
| Subject: drm/i915: Revert DisplayPort fast link training feature |
| |
| From: Mika Kahola <mika.kahola@intel.com> |
| |
| commit 34511dce4b35685d3988d5c8b100d11a068db5bd upstream. |
| |
| It has been found out that in some HW combination the DisplayPort |
| fast link training feature caused screen flickering. Let's revert |
| this feature for now until we can ensure that the feature works for |
| all platforms. |
| |
| This is a manual revert of commits 5fa836a9d859 ("drm/i915: DP link |
| training optimization") and 4e96c97742f4 ("drm/i915: eDP link training |
| optimization"). |
| |
| Fixes: 5fa836a9d859 ("drm/i915: DP link training optimization") |
| Fixes: 4e96c97742f4 ("drm/i915: eDP link training optimization") |
| Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393 |
| Reviewed-by: Jani Nikula <jani.nikula@intel.com> |
| Signed-off-by: Mika Kahola <mika.kahola@intel.com> |
| Signed-off-by: Jani Nikula <jani.nikula@intel.com> |
| Link: http://patchwork.freedesktop.org/patch/msgid/1466410226-19543-1-git-send-email-mika.kahola@intel.com |
| (cherry picked from commit 91df09d92ad82c8778ca218097bf827f154292ca) |
| Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/i915/intel_dp.c | 28 ++-------------------------- |
| drivers/gpu/drm/i915/intel_drv.h | 1 - |
| 2 files changed, 2 insertions(+), 27 deletions(-) |
| |
| --- a/drivers/gpu/drm/i915/intel_dp.c |
| +++ b/drivers/gpu/drm/i915/intel_dp.c |
| @@ -3628,8 +3628,7 @@ static bool |
| intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP, |
| uint8_t dp_train_pat) |
| { |
| - if (!intel_dp->train_set_valid) |
| - memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); |
| + memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); |
| intel_dp_set_signal_levels(intel_dp, DP); |
| return intel_dp_set_link_train(intel_dp, DP, dp_train_pat); |
| } |
| @@ -3746,22 +3745,6 @@ intel_dp_link_training_clock_recovery(st |
| break; |
| } |
| |
| - /* |
| - * if we used previously trained voltage and pre-emphasis values |
| - * and we don't get clock recovery, reset link training values |
| - */ |
| - if (intel_dp->train_set_valid) { |
| - DRM_DEBUG_KMS("clock recovery not ok, reset"); |
| - /* clear the flag as we are not reusing train set */ |
| - intel_dp->train_set_valid = false; |
| - if (!intel_dp_reset_link_train(intel_dp, &DP, |
| - DP_TRAINING_PATTERN_1 | |
| - DP_LINK_SCRAMBLING_DISABLE)) { |
| - DRM_ERROR("failed to enable link training\n"); |
| - return; |
| - } |
| - continue; |
| - } |
| |
| /* Check to see if we've tried the max voltage */ |
| for (i = 0; i < intel_dp->lane_count; i++) |
| @@ -3854,7 +3837,6 @@ intel_dp_link_training_channel_equalizat |
| /* Make sure clock is still ok */ |
| if (!drm_dp_clock_recovery_ok(link_status, |
| intel_dp->lane_count)) { |
| - intel_dp->train_set_valid = false; |
| intel_dp_link_training_clock_recovery(intel_dp); |
| intel_dp_set_link_train(intel_dp, &DP, |
| training_pattern | |
| @@ -3871,7 +3853,6 @@ intel_dp_link_training_channel_equalizat |
| |
| /* Try 5 times, then try clock recovery if that fails */ |
| if (tries > 5) { |
| - intel_dp->train_set_valid = false; |
| intel_dp_link_training_clock_recovery(intel_dp); |
| intel_dp_set_link_train(intel_dp, &DP, |
| training_pattern | |
| @@ -3893,10 +3874,8 @@ intel_dp_link_training_channel_equalizat |
| |
| intel_dp->DP = DP; |
| |
| - if (channel_eq) { |
| - intel_dp->train_set_valid = true; |
| + if (channel_eq) |
| DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n"); |
| - } |
| } |
| |
| void intel_dp_stop_link_train(struct intel_dp *intel_dp) |
| @@ -5159,9 +5138,6 @@ intel_dp_hpd_pulse(struct intel_digital_ |
| intel_display_power_get(dev_priv, power_domain); |
| |
| if (long_hpd) { |
| - /* indicate that we need to restart link training */ |
| - intel_dp->train_set_valid = false; |
| - |
| if (!intel_digital_port_connected(dev_priv, intel_dig_port)) |
| goto mst_fail; |
| |
| --- a/drivers/gpu/drm/i915/intel_drv.h |
| +++ b/drivers/gpu/drm/i915/intel_drv.h |
| @@ -783,7 +783,6 @@ struct intel_dp { |
| bool has_aux_irq, |
| int send_bytes, |
| uint32_t aux_clock_divider); |
| - bool train_set_valid; |
| |
| /* Displayport compliance testing */ |
| unsigned long compliance_test_type; |