| From foo@baz Wed Aug 22 09:42:09 CEST 2018 |
| From: Alison Wang <alison.wang@nxp.com> |
| Date: Tue, 24 Apr 2018 10:42:32 +0800 |
| Subject: drm: mali-dp: Enable Global SE interrupts mask for DP500 |
| |
| From: Alison Wang <alison.wang@nxp.com> |
| |
| [ Upstream commit 89610dc2c235e7b02bb9fba0ce247e12d4dde7cd ] |
| |
| In the situation that DE and SE aren’t shared the same interrupt number, |
| the Global SE interrupts mask bit MASK_IRQ_EN in MASKIRQ must be set, or |
| else other mask bits will not work and no SE interrupt will occur. This |
| patch enables MASK_IRQ_EN for SE to fix this problem. |
| |
| Signed-off-by: Alison Wang <alison.wang@nxp.com> |
| Acked-by: Liviu Dudau <liviu.dudau@arm.com> |
| Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> |
| Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/gpu/drm/arm/malidp_hw.c | 3 ++- |
| 1 file changed, 2 insertions(+), 1 deletion(-) |
| |
| --- a/drivers/gpu/drm/arm/malidp_hw.c |
| +++ b/drivers/gpu/drm/arm/malidp_hw.c |
| @@ -432,7 +432,8 @@ const struct malidp_hw_device malidp_dev |
| .vsync_irq = MALIDP500_DE_IRQ_VSYNC, |
| }, |
| .se_irq_map = { |
| - .irq_mask = MALIDP500_SE_IRQ_CONF_MODE, |
| + .irq_mask = MALIDP500_SE_IRQ_CONF_MODE | |
| + MALIDP500_SE_IRQ_GLOBAL, |
| .vsync_irq = 0, |
| }, |
| .dc_irq_map = { |
