| From c33b5cc7076b9140d5d393a2d750475b08d8efad Mon Sep 17 00:00:00 2001 |
| From: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| Date: Wed, 21 Nov 2018 19:11:06 +0100 |
| Subject: Revert "x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation" |
| |
| From: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| This reverts commit 66fe51cb35d91d75a67ec8a38caf03da95e8c191 which is |
| commit 53c613fe6349994f023245519265999eed75957f upstream. |
| |
| It's not ready for the stable trees as there are major slowdowns |
| involved with this patch. |
| |
| Reported-by: Jiri Kosina <jkosina@suse.cz> |
| Cc: Thomas Gleixner <tglx@linutronix.de> |
| Cc: Peter Zijlstra <peterz@infradead.org> |
| Cc: Josh Poimboeuf <jpoimboe@redhat.com> |
| Cc: Andrea Arcangeli <aarcange@redhat.com> |
| Cc: "WoodhouseDavid" <dwmw@amazon.co.uk> |
| Cc: Andi Kleen <ak@linux.intel.com> |
| Cc: Tim Chen <tim.c.chen@linux.intel.com> |
| Cc: "SchauflerCasey" <casey.schaufler@intel.com> |
| Cc: Rainer Fiebig <jrf@mailbox.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| arch/x86/kernel/cpu/bugs.c | 57 ++++----------------------------------------- |
| kernel/cpu.c | 11 -------- |
| 2 files changed, 7 insertions(+), 61 deletions(-) |
| |
| --- a/arch/x86/kernel/cpu/bugs.c |
| +++ b/arch/x86/kernel/cpu/bugs.c |
| @@ -33,10 +33,12 @@ static void __init spectre_v2_select_mit |
| static void __init ssb_select_mitigation(void); |
| static void __init l1tf_select_mitigation(void); |
| |
| -/* The base value of the SPEC_CTRL MSR that always has to be preserved. */ |
| -u64 x86_spec_ctrl_base; |
| +/* |
| + * Our boot-time value of the SPEC_CTRL MSR. We read it once so that any |
| + * writes to SPEC_CTRL contain whatever reserved bits have been set. |
| + */ |
| +u64 __ro_after_init x86_spec_ctrl_base; |
| EXPORT_SYMBOL_GPL(x86_spec_ctrl_base); |
| -static DEFINE_MUTEX(spec_ctrl_mutex); |
| |
| /* |
| * The vendor and possibly platform specific bits which can be modified in |
| @@ -320,46 +322,6 @@ static enum spectre_v2_mitigation_cmd __ |
| return cmd; |
| } |
| |
| -static bool stibp_needed(void) |
| -{ |
| - if (spectre_v2_enabled == SPECTRE_V2_NONE) |
| - return false; |
| - |
| - if (!boot_cpu_has(X86_FEATURE_STIBP)) |
| - return false; |
| - |
| - return true; |
| -} |
| - |
| -static void update_stibp_msr(void *info) |
| -{ |
| - wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base); |
| -} |
| - |
| -void arch_smt_update(void) |
| -{ |
| - u64 mask; |
| - |
| - if (!stibp_needed()) |
| - return; |
| - |
| - mutex_lock(&spec_ctrl_mutex); |
| - mask = x86_spec_ctrl_base; |
| - if (cpu_smt_control == CPU_SMT_ENABLED) |
| - mask |= SPEC_CTRL_STIBP; |
| - else |
| - mask &= ~SPEC_CTRL_STIBP; |
| - |
| - if (mask != x86_spec_ctrl_base) { |
| - pr_info("Spectre v2 cross-process SMT mitigation: %s STIBP\n", |
| - cpu_smt_control == CPU_SMT_ENABLED ? |
| - "Enabling" : "Disabling"); |
| - x86_spec_ctrl_base = mask; |
| - on_each_cpu(update_stibp_msr, NULL, 1); |
| - } |
| - mutex_unlock(&spec_ctrl_mutex); |
| -} |
| - |
| static void __init spectre_v2_select_mitigation(void) |
| { |
| enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline(); |
| @@ -459,9 +421,6 @@ specv2_set_mode: |
| setup_force_cpu_cap(X86_FEATURE_USE_IBRS_FW); |
| pr_info("Enabling Restricted Speculation for firmware calls\n"); |
| } |
| - |
| - /* Enable STIBP if appropriate */ |
| - arch_smt_update(); |
| } |
| |
| #undef pr_fmt |
| @@ -854,8 +813,6 @@ static ssize_t l1tf_show_state(char *buf |
| static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr, |
| char *buf, unsigned int bug) |
| { |
| - int ret; |
| - |
| if (!boot_cpu_has_bug(bug)) |
| return sprintf(buf, "Not affected\n"); |
| |
| @@ -870,12 +827,10 @@ static ssize_t cpu_show_common(struct de |
| return sprintf(buf, "Mitigation: __user pointer sanitization\n"); |
| |
| case X86_BUG_SPECTRE_V2: |
| - ret = sprintf(buf, "%s%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled], |
| + return sprintf(buf, "%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled], |
| boot_cpu_has(X86_FEATURE_USE_IBPB) ? ", IBPB" : "", |
| boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "", |
| - (x86_spec_ctrl_base & SPEC_CTRL_STIBP) ? ", STIBP" : "", |
| spectre_v2_module_string()); |
| - return ret; |
| |
| case X86_BUG_SPEC_STORE_BYPASS: |
| return sprintf(buf, "%s\n", ssb_strings[ssb_mode]); |
| --- a/kernel/cpu.c |
| +++ b/kernel/cpu.c |
| @@ -1970,12 +1970,6 @@ static void cpuhp_online_cpu_device(unsi |
| kobject_uevent(&dev->kobj, KOBJ_ONLINE); |
| } |
| |
| -/* |
| - * Architectures that need SMT-specific errata handling during SMT hotplug |
| - * should override this. |
| - */ |
| -void __weak arch_smt_update(void) { }; |
| - |
| static int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval) |
| { |
| int cpu, ret = 0; |
| @@ -2002,10 +1996,8 @@ static int cpuhp_smt_disable(enum cpuhp_ |
| */ |
| cpuhp_offline_cpu_device(cpu); |
| } |
| - if (!ret) { |
| + if (!ret) |
| cpu_smt_control = ctrlval; |
| - arch_smt_update(); |
| - } |
| cpu_maps_update_done(); |
| return ret; |
| } |
| @@ -2016,7 +2008,6 @@ static int cpuhp_smt_enable(void) |
| |
| cpu_maps_update_begin(); |
| cpu_smt_control = CPU_SMT_ENABLED; |
| - arch_smt_update(); |
| for_each_present_cpu(cpu) { |
| /* Skip online CPUs and CPUs on offline nodes */ |
| if (cpu_online(cpu) || !node_online(cpu_to_node(cpu))) |